Versatile Thermocouple Measurement Module
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INTRODUCTION
As a leading manufacturer of smart function modules, NAI offers over 100 different modules that cover a wide range of I/O, measurement and simulation, communications, Ethernet switch, and SBC functions. Our TC1 smart function module provides eight individual, isolated thermocouple or low-voltage range A/D measurement channels. This user manual is designed to help you get the most out of our Thermocouple smart function module.
TC1 Overview
NAI’s TC1 module offers a variety of advanced features tailored to meet the demands of wide-range temperature measurement applications, including the following:
NIST Thermocouple Interface Capability:
The TC1 function module features configuration programmability which provides interfaces for all standard NIST thermocouple types (J, K, T, E, N, B, R, and S), providing unparalleled versatility in thermocouple compatibility.
Self-Powered:
One standout feature of the module is its self-powered functionality, eliminating the need for external power sources and simplifying installation. This not only streamlines the setup process but also enhances its suitability for a wide range of applications.
Large Temperature Range:
The TC1 function module boasts an expansive temperature measurement range, reaching a remarkable 2300⁰C. This exceptional range makes it well-suited for applications where extreme temperatures are encountered, such as jet engines and gas turbine exhaust.
Up to ±0.2⁰C Accuracy:
With thermo-block compensation, the TC1 function module provides compensated measurements at accuracies up to ±0.2⁰C.
Optional Thermo-Block Compensation:
NAI offers an optional accessory (ACC-ISO-THERM-BLK2) which connects to the TC1 function module, allowing for automatic cold junction compensation temperature through an onboard RTD temperature sensor (CH8 will automatically configure to RTD mode if this accessory is used).
Programmable Sample Rate:
Users can set the sampling rate of the analog-to-digital converter (A/D) to match the specific needs of their application. This programmable sample rate ensures that data acquisition is optimized for accuracy and efficiency.
Offset Temperature:
The offset temperature feature provides users with the means to nullify system-induced measurement errors. This is crucial in achieving the highest level of measurement precision and reliability, especially in critical applications where accuracy is paramount.
PRINCIPLE OF OPERATION
The thermocouple is a temperature-measuring device typically consisting of two dissimilar conductors that contact each other at one or more spots. It produces a voltage when the temperature of one of the spots differs from the reference temperature at other parts of the circuit. Thermocouples are a widely used type of temperature sensor for measurement and control and can also convert a temperature gradient into electricity.
In contrast to most other methods of temperature measurement, thermocouples are self-powered and require no external form of excitation. The main limitation with thermocouples is accuracy; system errors of less than 1°C can be difficult to achieve. Thermocouples are suitable for measuring over a large temperature range, up to 2300 °C. Applications include temperature measurement for rocket and/or jet engines, gas turbine exhaust, diesel engines and other MIL/AERO/INDUSTRIAL embedded or test processes. They are arguably less suitable for applications where smaller temperature differences need to be measured with high accuracy, for example the range 0–100 °C with 0.1 °C accuracy. For such applications resistance temperature detectors (RTDs) such as NAI’s RT1 may be more suitable.
Thermocouple Capability
While in thermocouple mode, the TC1 provides up to eight individual isolated thermocouple or low-voltage range A/D measurement channels. Configuration programmability provides interfaces for industry standard NIST thermocouple types (J, K, T, E, N, B, R, and S).
Thermocouples are widely used temperature-measurement devices because of their ruggedness, repeatability and fast response time. They offer a cost-effective means for measuring a much wider range of temperatures in comparison to other common solutions like resistance temperature devices (RTD), thermistors, or temperature-sensing integrated circuits (ICs). Although thermocouples can be used over a wider range of temperatures than RTDs and temperature-sensing ICs, they are far less linear. Also, RTDs and temperature-sensing ICs typically offer better sensitivity and accuracy. Thermocouple signals are very low-level and often require amplification or a high-resolution data converter to process the signals. Despite these disadvantages, overall cost, ease of use, and wide temperature range make thermocouples popular.
Thermocouples are constructed with two wires made from dissimilar metals. One wire is predesignated as the positive side, and the other as the negative. The industry standard NIST thermocouple types are defined by the metals or alloys used and the temperature range allowed for each type. Each thermocouple type offers a unique thermoelectric characteristic over its specified temperature range.
In Figure 1, the voltage generated by the loop is a function of the temperature difference between the two junctions. This phenomenon is known as the Seebeck effect which is described as the process in which thermal energy is converted into electrical energy. The Peltier effect is the opposite of the Seebeck effect which is the process of converting electrical energy to thermal energy. In Figure 1, the measure output voltage (VOUT ) is a function of the difference between the measuring (hot) junction voltage and the reference (cold) junction voltage. Since VHOT and VCOLD are generated by a temperature difference between the two junctions, VOUT is also a function of this temperature difference. The scale factor, α (Seebeck coefficient), relates the voltage difference to the temperature difference.
Figure 2 illustrates the configuration most used in thermocouple applications. In this configuration, a third metal (known as an intermediate metal) such as copper, is introduced into the loop and the two additional junctions. In this configuration, provided the two junctions are at the same temperature, the intermediate metal type has no effect on the output voltage. This configuration allows the thermocouple to be used without a separate reference junction. V is still a function of the difference between the hot- and cold-junction temperature, related by the Seebeck coefficient. In this configuration, the cold-junction temperature must be known to determine the actual temperature measured at the hot-junction.
The simplest case occurs when the cold-junction temperature is at 0° C, also known as an ice-bath reference. At TCOLD = 0° C, VOUT = VHOT . In this case, the voltage measured at the hot-junction is a direct translation of the actual temperature at that junction.
When the cold-junction temperature is not at 0° C, the temperature of this junction must be known to determine the actual hot-junction temperature. The output voltage of the thermocouple must also be compensated to account for the voltage created by the nonzero cold-junction temperature. This process is known as cold-junction compensation.
NAI provides an optional accessory, NAI P/N ACC-ISO-THERM-BLK2, a thermocouple connection interface comprised of a separate isothermal interface/terminal block. The thermocouple sensors are connected to the accessory’s copper measurement wiring harness, allowing for automatic cold junction compensation temperature through an onboard RTD temperature sensor reporting the terminal temperature to a dedicated channel on the module (refer to Appendix A: Optional External Cold Junction Compensation Block Accessory).
Note
|
when the configuration for the isothermal interface/terminal block (referred to as Cold Junction Compensation Block) is selected, Channel 8 of the TC1 module will be automatically configured for RTD mode, so this channel cannot be used as a thermocouple channel. |
In lieu of the External Cold Junction Compensation Block Accessory, a user supplied terminal connection block may also be used, provided the terminal temperature is measured and maintained in the manual cold junction compensation temperature register for proper compensation. A benefit of this would be the availability of Channel 8 for an additional Thermocouple or RTD measurement channel.
In addition to cold-junction temperature compensation, the TC1 provides the ability to program temperature offsets, which can be used to null out small temperature deviations from sensors or system interconnections as well as delta measurements from an initial temperature reading. The offset temperature is subtracted from the output temperature reading and may be configured individually for each channel.
The fundamental design of the TC1 is based on independent 24-bit Sigma-Delta A/D converters for each channel. This allows the TC1 to also be used for direct precision low voltage measurements (±78.125 mV) for uses in low-voltage range A/D applications (i.e. shunt resistor voltage/current sense measurements).
TC1 is designed for rugged embedded “on-the-move” or laboratory-grade environments, and provides continuous background built-in-test (BIT) capabilities for accuracy and “open” detection monitoring and flagging.
Low Voltage A/D Measurement Capability
The module can measure low voltage dynamic signals in the microvolt range with faster update rates to 4800 Hz. Readings can track dynamic signals when high rates are selected, with some increase in noise jitter. Optimal accuracy and reading stability will be achieved by low update rate selections.
Default configuration runs periodic maintenance in the background for self-test and calibration at 30 second intervals, which briefly suspends reading updates during the performance of these routines. For time critical measurements, the periodic internal processes may optionally be suspended for continuous and uninterrupted readings. During this time, these maintenance operations may be triggered manually by the user at suitable intervals.
Automatic Background Built-In Test (BIT)/Diagnostic Capability
Automatic background BIT testing is provided. Each channel is checked at periodic intervals for correct A/D operation using an internal measurement of an on-board resistor reference. The open input detection test applies a low-level current pulse to the A/D converter inputs and tests for a full-scale 3.3V limit, indicating an open sensor circuit. Any failure triggers an interrupt if enabled, with the results available in the status registers. The testing is transparent to the user and has no effect on the operation of this module. Enabled by default at power on, it may optionally be disabled.
Temperature Threshold Capability Programming
The TC1 provides the ability to program two temperature thresholds that will result in temperature alerts. For each threshold, a “low” and a “high” threshold value is specified that will be used to set the Temperature Alert statuses. The Temperature Threshold Low registers sets the threshold values to use to set the Temperature Alert Low status bit when the Temperature reading is below the low temperature threshold value. Conversely, the Temperature Threshold High registers sets the threshold values to use to set the Temperature Alert High status bit when the Temperature reading is above the high temperature threshold value. These threshold values are individually configurable on a per channel basis.
A possible usage of the two temperature thresholds is to use the first threshold detection levels as an early warning pre-alarm level and the second threshold detection levels as an alarm limit value. For this purpose, the Detect 2 thresholds should be set at larger deviation values from the nominal temperature than the Detect 1 thresholds.
For example:
(Threshold Low 2) < (Threshold Low 1) < (Nominal Temperature) < (Threshold High 1) < (Threshold High 2)
This allows the Detect 1 thresholds to serve as a pre-alert warning of temperature excursion, while Detect 2 may represent an alarm condition.
Note
|
these detect thresholds are not necessarily set in this order and may be independently set either way. |
Status and Interrupts
The TC1 Function Module provide registers that indicate faults or events. Refer to “Status and Interrupts Module Manual” for the Principle of Operation description.
Module Common Registers
The TC1 Function Module includes module common registers that provide access to module-level bare metal/FPGA revisions & compile times, unique serial number information, and temperature/voltage/current monitoring. Refer to “Module Common Registers Module Manual” for the detailed information.
REGISTER DESCRIPTIONS
The register descriptions provide the register name, Register Offset, Type, Data Range, Read or Write information, Initialized Value, a description of the function and, in most cases, a data table.
Measurement Registers
The TC1 measurement registers provide Temperature measurements (in both Celsius and Fahrenheit degrees) and Voltage Measurements.
Temperature (°C)
Function: Measures the temperature of the thermocouple sensor.
Type: Single Precision Floating Point Value (IEEE-754)
Data Range: NA
Read/Write: R
Initialized Value: NA
Operational Settings: Thermocouple temperature measurement in degrees Celsius. The value is dependent upon the appropriate and expected selections made in the Thermocouple Type and Compensation Type registers.
Temperature (°F)
Function: Measures the temperature of the thermocouple sensor
Type: Single Precision Floating Point Value (IEEE-754)
Data Range: NA
Read/Write: R
Initialized Value: NA
Operational Settings: Thermocouple temperature measurement in degrees Fahrenheit. The value is dependent upon the appropriate and expected selections made in the Thermocouple Type and Compensation Type registers.
Voltage
Function: Measures the direct input voltages at the TC1 channels.
Type: Single Precision Floating Point Value (IEEE-754)
Data Range: N/A
Read/Write: R
Initialized Value: N/A
Operational Settings: Voltage measurement of the TC1 channel in V.
Note
|
the register does not include the cold junction compensation. |
Control Registers
The TC1 control registers provide the ability to configure the channels to either Thermocouple or RTD mode and specifying the sample rate, Thermocouple type and Thermocouple temperature compensation settings.
RTD or Thermocouple
Function: Indicates whether the module is an RTD or Thermocouple.
Data Range: 0x0
Read/Write: R
Initialized Value: 0 (TC Mode)
Operational Settings: On the TC1 the value of the RTD or Thermocouple register is set to 0 for Thermocouple (TC) mode.
RTD or Thermocouple Select |
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D31 |
D30 |
D29 |
D28 |
D27 |
D26 |
D25 |
D24 |
D23 |
D22 |
D21 |
D20 |
D19 |
D18 |
D17 |
D16 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
D15 |
D14 |
D13 |
D12 |
D11 |
D10 |
D9 |
D8 |
D7 |
D6 |
D5 |
D4 |
D3 |
D2 |
D1 |
D0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
Ch8 |
Ch7 |
Ch6 |
Ch5 |
Ch4 |
Ch3 |
Ch2 |
Ch1 |
Sample Rate
Function: Sets the sampling rate of the sensor.
Type: unsigned binary word (32-bit)
Data Range: 0x00 to 0x27 (See table)
Read/Write: R/W
Initialized Value: 0x0
Operational Settings: Set the value based on Sample Rate table. Per channel configuration.
Note
|
lower rates provide greater stability and accuracy in the readings. |
Sample Rate Register Value |
Update Frequency (Hz) |
0x0 |
4800 |
0x1 |
2400 |
0x2 |
1600 |
0x3 |
1200 |
0x4 |
960 |
0x5 |
800 |
0x6 |
600 |
0x7 |
480 |
0x8 |
400 |
0x9 |
320 |
0xA |
300 |
0xB |
240 |
0xC |
200 |
0xD |
192 |
0xE |
160 |
0xF |
150 |
0x10 |
120 |
0x11 |
100 |
0x12 |
96 |
0x13 |
80 |
0x14 |
75 |
0x15 |
64 |
0x16 |
60 |
0x17 |
50 |
0x18 |
48 |
0x19 |
40 |
0x1A |
32 |
0x1B |
30 |
0x1C |
25 |
0x1D |
24 |
0x1E |
20 |
0x1F |
16 |
0x20 |
15 |
0x21 |
12 |
0x22 |
10 |
0x23 |
8 |
0x24 |
6 |
0x25 |
5 |
0x26 |
4 |
0x27 |
3 |
Sample Rate |
|||||||||||||||
D31 |
D30 |
D29 |
D28 |
D27 |
D26 |
D25 |
D24 |
D23 |
D22 |
D21 |
D20 |
D19 |
D18 |
D17 |
D16 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
D15 |
D14 |
D13 |
D12 |
D11 |
D10 |
D9 |
D8 |
D7 |
D6 |
D5 |
D4 |
D3 |
D2 |
D1 |
D0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
D |
D |
D |
D |
D |
D |
D |
D |
Offset Temperature
Function: Set a user defined offset temperature in °C. The value in this register is subtracted from the temperature readings. The raw voltage and resistance readings are not affected. Programming the Offset Temperature register provides the ability to null any system measurement errors and adjust slight variations in the thermocouple and measurement circuitry.
Type: Single Precision Floating Point Value (IEEE-754)
Data Range: N/A
Read/Write: R/W
Initialized Value: 0.0
Operational Settings: Sets the user defined offset temperature to be used.
Thermocouple Type
Function: Sets the type of thermocouple (J, K, T, E, N, B, R, S)
Type: ASCII Hex as unsigned binary word (32-bit)
Data Range: See table.
Read/Write: R/W
Initialized Value: “K”
Operational Settings: Set the Thermocouple Type as specified in the table.
Note
|
the register entry is the ASCII hex equivalent value for the thermocouple type. |
Thermocouple Type |
ASCII Entry (Hex Conversion) |
J |
0x4A |
K |
0x4B |
T |
0x54 |
E |
0x45 |
N |
0x4E |
B |
0x42 |
R |
0x52 |
S |
0x53 |
Thermocouple Type |
|||||||||||||||
D31 |
D30 |
D29 |
D28 |
D27 |
D26 |
D25 |
D24 |
D23 |
D22 |
D21 |
D20 |
D19 |
D18 |
D17 |
D16 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
D15 |
D14 |
D13 |
D12 |
D11 |
D10 |
D9 |
D8 |
D7 |
D6 |
D5 |
D4 |
D3 |
D2 |
D1 |
D0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
D |
D |
D |
D |
D |
D |
D |
D |
Automatic Cold Junction Compensation Enable
Function: When Automatic Cold Junction Compensation is enabled, Channel 8 is automatically configured in RTD mode, to allow its temperature reading to be used for compensation of terminal connection temperatures at other than °C.
Note
|
the RTD temperature reading for Channel 8 will be used as the Thermocouple Compensation Temperature only for channels with the Compensation Type set to “automatic compensation”; otherwise the manual temperature compensation entries for those channels will still apply. |
Type: unsigned binary word (32-bit)
Data Range: 0 or 1
Read/Write: R/W
Initialized Value: 0
Operational Settings: Enable (1) or disable (0) to use the RTD reading for Channel 8 as the Compensation Temperature when Compensation Type is set to “automatic compensation”.
Automatic Cold Junction Compensation Enable |
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D31 |
D30 |
D29 |
D28 |
D27 |
D26 |
D25 |
D24 |
D23 |
D22 |
D21 |
D20 |
D19 |
D18 |
D17 |
D16 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
D15 |
D14 |
D13 |
D12 |
D11 |
D10 |
D9 |
D8 |
D7 |
D6 |
D5 |
D4 |
D3 |
D2 |
D1 |
D0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
D |
Compensation Type
Function: Selects the compensation value source to use for the Thermocouple Temperature value. The selection can either be the user specified value in the Compensation Temperature register or the Channel 8 RTD reading from the accessory Cold Junction Compensation Block.
Type: unsigned binary word (32-bit)
Data Range: 0 (user specified temperature) or 1 (use Ch.8 temperature reading)
Read/Write: R/W
Initialized Value: 0x0 (manual)
Operational Settings: Set to user defined selection (0) to use the value in the Compensation Temperature register. Set to automatic compensation (1) to use Channel 8 RTD reading from the Cold Junction Compensation Block.
Compensation Type |
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D31 |
D30 |
D29 |
D28 |
D27 |
D26 |
D25 |
D24 |
D23 |
D22 |
D21 |
D20 |
D19 |
D18 |
D17 |
D16 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
D15 |
D14 |
D13 |
D12 |
D11 |
D10 |
D9 |
D8 |
D7 |
D6 |
D5 |
D4 |
D3 |
D2 |
D1 |
D0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
D |
Compensation Temperature
Function: Set a user defined compensation temperature in °C.
Type: Single Precision Floating Point Value (IEEE-754)
Data Range: N/A
Read/Write: R/W
Initialized Value: 0.0
Operational Settings: Sets the user defined compensation temperature to be used.
Suspend Background Maintenance Operations Registers
The default configuration of the module is to run periodic self-test and calibration at 30 second intervals. During these operations, updates to the measurement readings are briefly suspended. For time critical measurements, such as using a channel for low voltage A/D measurements, the periodic internal processes may optionally be suspended for continuous and uninterrupted readings. During this suspended time, the maintenance operations for calibration and open-line detect may be triggered manually by the application at suitable intervals.
Suspend Background Maintenance Operations
Function: Holds off the performance of periodic maintenance routines for internal system calibration (TC mode), open line status checking, and built-in test (BIT). Used for dynamic measurements for continuous reading updates without interruption from the brief maintenance operations.
Type: unsigned binary word (32-bit)
Data Range: 0x0000 0000 to 0x0000 00FF
Read/Write: R/W
Initialized Value: 0 (All channels run maintenance operations on a scheduled basis)
Operational Settings: Suspends periodic operations for open line status check, system calibration, and BIT. Set to 0 to perform periodic operations for channel (default). Set bit to 1 to suspend the background maintenance operations for the specified channel.
Disable Maintenance Operations |
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D31 |
D30 |
D29 |
D28 |
D27 |
D26 |
D25 |
D24 |
D23 |
D22 |
D21 |
D20 |
D19 |
D18 |
D17 |
D16 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
D15 |
D14 |
D13 |
D12 |
D11 |
D10 |
D9 |
D8 |
D7 |
D6 |
D5 |
D4 |
D3 |
D2 |
D1 |
D0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
Ch8 |
Ch7 |
Ch6 |
Ch5 |
Ch4 |
Ch3 |
Ch2 |
Ch1 |
Run System Calibration
Function: Triggers performance of internal system calibration for channels where the periodic maintenance operations have been disabled. The calibration is normally run at 2-minute intervals to compensate for any internal drift on measurements. This one-time trigger is only used when the periodic schedule has been disabled for time critical measurements. This allows the user to run the routine in between measurement sessions.
Type: unsigned binary word (32-bit)
Data Range: 0x0000 0000 to 0x0000 00FF
Read/Write: R/W
Initialized Value: 0
Operational Settings: Write a 1 to the corresponding bit for the channel. Bit is self-clearing and will reset to zero on completion of the routine.
Run System Calibration |
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D31 |
D30 |
D29 |
D28 |
D27 |
D26 |
D25 |
D24 |
D23 |
D22 |
D21 |
D20 |
D19 |
D18 |
D17 |
D16 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
D15 |
D14 |
D13 |
D12 |
D11 |
D10 |
D9 |
D8 |
D7 |
D6 |
D5 |
D4 |
D3 |
D2 |
D1 |
D0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
Ch8 |
Ch7 |
Ch6 |
Ch5 |
Ch4 |
Ch3 |
Ch2 |
Ch1 |
Run Open-Line Check
Function: : Triggers check for open or unconnected channels to update the open status indication. This is only used when the periodic schedule has been disabled for time critical measurements. This allows the application to run the routine in between measurement sessions.
Type: unsigned binary word (32-bit)
Data Range: 0x0000 0000 to 0x0000 00FF
Read/Write: R/W
Initialized Value: 0
Operational Settings: Write a 1 to the corresponding bit for the channel. Bit is self-clearing and will reset to zero on completion of the routine.
Run Open-Line Check |
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D31 |
D30 |
D29 |
D28 |
D27 |
D26 |
D25 |
D24 |
D23 |
D22 |
D21 |
D20 |
D19 |
D18 |
D17 |
D16 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
D15 |
D14 |
D13 |
D12 |
D11 |
D10 |
D9 |
D8 |
D7 |
D6 |
D5 |
D4 |
D3 |
D2 |
D1 |
D0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
Ch8 |
Ch7 |
Ch6 |
Ch5 |
Ch4 |
Ch3 |
Ch2 |
Ch1 |
Run BIT
Function: Triggers Built-In-Test to detect out of tolerance conditions on the measurement circuitry. Only used when the periodic schedule for the channel has been disabled for time critical measurements. This allows the user to run the routine in between measurement sessions.
Type: unsigned binary word (32-bit)
Data Range: 0x0000 0000 to 0x0000 00FF
Read/Write: R/W
Initialized Value: 0
Operational Settings: Write a 1 to the corresponding bit for the channel. Bit is self-clearing and will reset to zero on completion of the routine.
Run BIT |
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D31 |
D30 |
D29 |
D28 |
D27 |
D26 |
D25 |
D24 |
D23 |
D22 |
D21 |
D20 |
D19 |
D18 |
D17 |
D16 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
D15 |
D14 |
D13 |
D12 |
D11 |
D10 |
D9 |
D8 |
D7 |
D6 |
D5 |
D4 |
D3 |
D2 |
D1 |
D0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
Ch8 |
Ch7 |
Ch6 |
Ch5 |
Ch4 |
Ch3 |
Ch2 |
Ch1 |
Temperature Threshold Detect Programming Registers
The TC1 Temperature Threshold registers provide the ability to program two temperature thresholds that will result in temperature alerts.
Temperature Threshold Detect 1
A “low” and a “high” threshold value is specified for each temperature threshold that will be used to set the Temperature Alert statuses. The Temperature Threshold Low 1 register sets the threshold value to use to set the Temperature Alert Low 1 status bit when the Temperature reading is below the low temperature threshold value. Conversely, the Temperature Threshold High 1 register sets the threshold values to use to set the Temperature Alert High 1 status bit when the Temperature reading is above the high temperature threshold value. These threshold values are individually configurable on a per channel basis.
Temperature Threshold Low 1
Function: Sets Temperature Threshold Low 1 value in degrees Celsius for each channel.
Type: Single Precision Floating Point Value (IEEE-754)
Data Range: NA
Read/Write: R/W
Initialized Value: -40° C
Operational Settings: If the temperature drops below the set value, then a Temperature Alert Low 1 Status will be set. An interrupt will occur if the Temperature Alert Low 1 Interrupt Enable register is set to 1.
Temperature Threshold High 1
Function: Sets Temperature Threshold High 1 value in degrees Celsius for each channel.
Type: Single Precision Floating Point Value (IEEE-754)
Data Range: NA
Read/Write: R/W
Initialized Value: 25° C
Operational Settings: If the temperature exceeds the set value, then a Temperature Alert High 1 Status will be set. An interrupt will occur if the Temperature Alert High 1 Interrupt Enable register is set to 1.
Temperature Threshold Detect 2
A “low” and a “high” threshold value is specified for each temperature threshold that will be used to set the Temperature Alert statuses. The Temperature Threshold Low 2 register sets the threshold value to use to set the Temperature Alert Low 2 status bit when the Temperature reading is below the low temperature threshold value. Conversely, the Temperature Threshold High 2 register sets the threshold values to use to set the Temperature Alert High 2 status bit when the Temperature reading is above the high temperature threshold value. These threshold values are individually configurable on a per channel basis.
Temperature Threshold Low 2
Function: Sets Temperature Threshold Low 2 value in degrees Celsius for each channel.
Type: Single Precision Floating Point Value (IEEE-754)
Data Range: N/A
Read/Write: R/W
Initialized Value: 0°C
Operational Settings: If the temperature drops below the set value, then a Temperature Alert Low 2 Status will be set. An interrupt will occur if the Temperature Alert Low 2 Interrupt Enable register is set to 1.
Temperature Threshold High 2
Function: Sets Temperature Threshold High 2 value in degrees Celsius for each channel.
Type: Single Precision Floating Point Value (IEEE-754)
Data Range: NA
Read/Write: R/W
Initialized Value: 100° C
Operational Settings: If the temperature exceeds the set value, then a Temperature Alert High 2 Status will be set. An interrupt will occur if the Temperature Alert High 2 Interrupt Enable register is set to 1.
Module Common Registers
Refer to “Module Common Registers Module Manual” for the register descriptions.
Status and Interrupts
The TC1 Module provides status registers for BIT, Open, and Temperature Alert.
Channel Status Enabled
Function: Determines whether to update the status for the channels. This feature can be used to “mask” status bits of unused channels in status registers that are bitmapped by channel.
Type: unsigned binary word (32-bit)
Data Range: 0x0000 0000 to 0x0000 00FF (Channel Status)
Read/Write: R/W
Initialized Value: 0x0000 00FF
Operational Settings: When the bit corresponding to a given channel in the Channel Status Enabled register is not enabled (0) the status will be masked and report “0” or “no failure”. This applies to all statuses that are bitmapped by channel (BIT Status, Open Status, Temperature Alerts and Summary Status).
Note
|
Background BIT will continue to run even if the Channel Status Enabled is set to '0'. |
Channel Status Enabled |
|||||||||||||||
D31 |
D30 |
D29 |
D28 |
D27 |
D26 |
D25 |
D24 |
D23 |
D22 |
D21 |
D20 |
D19 |
D18 |
D17 |
D16 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
D15 |
D14 |
D13 |
D12 |
D11 |
D10 |
D9 |
D8 |
D7 |
D6 |
D5 |
D4 |
D3 |
D2 |
D1 |
D0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
Ch8 |
Ch7 |
Ch6 |
Ch5 |
Ch4 |
Ch3 |
Ch2 |
Ch1 |
BIT Status
There are four registers associated with the BIT Status: Dynamic, Latched, Interrupt Enable, and Set Edge/Level Interrupt.
BIT Dynamic Status |
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BIT Latched Status |
|||||||||||||||
BIT Interrupt Enable |
|||||||||||||||
BIT Set Edge/Level Interrupt |
|||||||||||||||
D31 |
D30 |
D29 |
D28 |
D27 |
D26 |
D25 |
D24 |
D23 |
D22 |
D21 |
D20 |
D19 |
D18 |
D17 |
D16 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
D15 |
D14 |
D13 |
D12 |
D11 |
D10 |
D9 |
D8 |
D7 |
D6 |
D5 |
D4 |
D3 |
D2 |
D1 |
D0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
Ch8 |
Ch7 |
Ch6 |
Ch5 |
Ch4 |
Ch3 |
Ch2 |
Ch1 |
Function: Indicates the corresponding channels associated with the channel’s BIT status or configuration
Type: unsigned binary word (32-bit)
Data Range: 0x0000 0000 to 0x0000 00FF
Read/Write: R (Dynamic), R/W (Latched, Interrupt Enable, Edge/Level Interrupt)
Initialized Value: 0
Open Status
There are four registers associated with the Open Status: Dynamic, Latched, Interrupt Enable, and Set Edge/Level Interrupt.
Open Dynamic Status |
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Open Latched Status |
|||||||||||||||
Open Interrupt Enable |
|||||||||||||||
Open Set Edge/Level Interrupt |
|||||||||||||||
D31 |
D30 |
D29 |
D28 |
D27 |
D26 |
D25 |
D24 |
D23 |
D22 |
D21 |
D20 |
D19 |
D18 |
D17 |
D16 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
D15 |
D14 |
D13 |
D12 |
D11 |
D10 |
D9 |
D8 |
D7 |
D6 |
D5 |
D4 |
D3 |
D2 |
D1 |
D0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
Ch8 |
Ch7 |
Ch6 |
Ch5 |
Ch4 |
Ch3 |
Ch2 |
Ch1 |
Function: Sets the corresponding bit associated with the channel’s Open status indication for an unconnected input.
Type: unsigned binary word (32-bit)
Data Range: 0x0000 0000 to 0x0000 00FF
Read/Write: R (Dynamic), R/W (Latched, Interrupt Enable, Edge/Level Interrupt)
Initialized Value: 0
Temperature Alert Status
There are four registers associated with each of the Temperature Alert Statuses: Dynamic, Latched, Interrupt Enable, and Set Edge/Level Interrupt.
Temperature Alert Low 1 Dynamic Status |
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Temperature Alert Low 1 Latched Status |
|||||||||||||||
Temperature Alert Low 1 Interrupt Enable |
|||||||||||||||
Temperature Alert Low 1 Set Edge/Level Interrupt |
|||||||||||||||
Temperature Alert High 1 Dynamic Status |
|||||||||||||||
Temperature Alert High 1 Latched Status |
|||||||||||||||
Temperature Alert High 1 Interrupt Enable |
|||||||||||||||
Temperature Alert High 1 Set Edge/Level Interrupt |
|||||||||||||||
Temperature Alert Low 2 Dynamic Status |
|||||||||||||||
Temperature Alert Low 2 Latched Status |
|||||||||||||||
Temperature Alert Low 2 Interrupt Enable |
|||||||||||||||
Temperature Alert Low 2 Set Edge/Level Interrupt |
|||||||||||||||
Temperature Alert High 2 Dynamic Status |
|||||||||||||||
Temperature Alert High 2 Latched Status |
|||||||||||||||
Temperature Alert High 2 Interrupt Enable |
|||||||||||||||
Temperature Alert High 2 Set Edge/Level Interrupt |
|||||||||||||||
D31 |
D30 |
D29 |
D28 |
D27 |
D26 |
D25 |
D24 |
D23 |
D22 |
D21 |
D20 |
D19 |
D18 |
D17 |
D16 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
D15 |
D14 |
D13 |
D12 |
D11 |
D10 |
D9 |
D8 |
D7 |
D6 |
D5 |
D4 |
D3 |
D2 |
D1 |
D0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
Ch8 |
Ch7 |
Ch6 |
Ch5 |
Ch4 |
Ch3 |
Ch2 |
Ch1 |
Function: Sets the corresponding bit associated with the channel’s Temperature Alert indication for temperature readings that are below or above the associated thresholds.
Type: unsigned binary word (32-bit)
Data Range: 0x0000 0000 to 0x0000 00FF
Read/Write: R (Dynamic), R/W (Latched, Interrupt Enable, Edge/Level Interrupt)
Initialized Value: 0
Summary Status
There are four registers associated with the Summary Status: Dynamic, Latched, Interrupt Enable, and Set Edge/Level Interrupt.
Summary Status Dynamic Status |
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Summary Status Latched Status |
|||||||||||||||
Summary Status Interrupt Enable |
|||||||||||||||
Summary Status Set Edge/Level Interrupt |
|||||||||||||||
D31 |
D30 |
D29 |
D28 |
D27 |
D26 |
D25 |
D24 |
D23 |
D22 |
D21 |
D20 |
D19 |
D18 |
D17 |
D16 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
D15 |
D14 |
D13 |
D12 |
D11 |
D10 |
D9 |
D8 |
D7 |
D6 |
D5 |
D4 |
D3 |
D2 |
D1 |
D0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
Ch8 |
Ch7 |
Ch6 |
Ch5 |
Ch4 |
Ch3 |
Ch2 |
Ch1 |
Function: Sets the corresponding bit when a fault is detected for BIT or Open on that channel.
Type: unsigned binary word (32-bit)
Data Range: 0x0000 0000 to 0x0000 00FF
Read/Write: R (Dynamic), R/W (Latched, Interrupt Enable, Edge/Level Interrupt)
Initialized Value: 0
Interrupt Vector Steering
When interrupts are enabled, the interrupt vector associated with the specific interrupt can be programmed (typically with a unique number/identifier) such that it can be utilized in the Interrupt Service Routine (ISR) to identify the type of interrupt. When an interrupt occurs, the contents of the Interrupt Vector registers is reported as part of the interrupt mechanism.
In addition to specifying the interrupt vector, the interrupt can be directed (“steered”) to the native bus or to the application running on the onboard ARM processor.
Note
|
the Interrupt Vector and Interrupt Steering registers are mapped to the Motherboard Common Memory and these registers are associated with the Module Slot position (refer to Function Register Map). |
Interrupt Vector
Function: Set an identifier for the interrupt.
Type: unsigned binary word (32-bit)
Data Range: 0 to 0xFFFF FFFF
Read/Write: R/W
Initialized Value: 0
Operational Settings: When an interrupt occurs, this value is reported as part of the interrupt mechanism.
Interrupt Steering
Function: Sets where to direct the interrupt.
Type: unsigned binary word (32-bit)
Data Range: see table
Read/Write: R/W
Initialized Value: 0
Operational Settings: When an interrupt occurs, the interrupt is sent as specified:
Direct Interrupt to VME |
1 |
Direct Interrupt to ARM Processor (via SerDes) (Custom App on ARM or NAI Ethernet Listener App) |
2 |
Direct Interrupt to PCIe Bus |
5 |
Direct Interrupt to cPCI Bus |
6 |
FUNCTION REGISTER MAP
Key:
Bold Italic = Configuration/Control
Bold Underline = Measurement/Status
*When an event is detected, the bit associated with the event is set in this register and will remain set until the user clears the event bit. Clearing the bit requires writing a 1 back to the specific bit that was set when read (i.e. write-1-to-clear, writing a '1' to a bit set to '1' will set the bit to '0').
~ Data is always in Floating Point.
Measurement Registers
0x1004 |
Temperature (ºC) Ch 1~ |
R |
0x1044 |
Temperature (ºC) Ch 2~ |
R |
0x1084 |
Temperature (ºC) Ch 3~ |
R |
0x10C4 |
Temperature (ºC) Ch 4~ |
R |
0x1104 |
Temperature (ºC) Ch 5~ |
R |
0x1144 |
Temperature (ºC) Ch 6~ |
R |
0x1184 |
Temperature (ºC) Ch 7~ |
R |
0x11C4 |
Temperature (ºC) Ch 8~ |
R |
0x1008 |
Temperature (ºF) Ch 1~ |
R |
0x1048 |
Temperature (ºF) Ch 2~ |
R |
0x1088 |
Temperature (ºF) Ch 3~ |
R |
0x10C8 |
Temperature (ºF) Ch 4~ |
R |
0x1108 |
Temperature (ºF) Ch 5~ |
R |
0x1148 |
Temperature (ºF) Ch 6~ |
R |
0x1188 |
Temperature (ºF) Ch 7~ |
R |
0x11C8 |
Temperature (ºF) Ch 8~ |
R |
0x1000 |
Voltage Ch 1~ |
R |
0x1040 |
Voltage Ch 2~ |
R |
0x1080 |
Voltage Ch 3~ |
R |
0x10C0 |
Voltage Ch 4~ |
R |
0x1100 |
Voltage Ch 5~ |
R |
0x1140 |
Voltage Ch 6~ |
R |
0x1180 |
Voltage Ch 7~ |
R |
0x11C0 |
Voltage Ch 8~ |
R |
Control Registers
0x2000 |
Mode Select Ch.1-8 |
R |
0x1028 |
Sample Rate Ch 1 |
R/W |
0x1068 |
Sample Rate Ch 2 |
R/W |
0x10A8 |
Sample Rate Ch 3 |
R/W |
0x10E8 |
Sample Rate Ch 4 |
R/W |
0x1128 |
Sample Rate Ch 5 |
R/W |
0x1168 |
Sample Rate Ch 6 |
R/W |
0x11A8 |
Sample Rate Ch 7 |
R/W |
0x11E8 |
Sample Rate Ch 8 |
R/W |
0x102C |
Offset Temperature Ch 1~ |
R/W |
0x106C |
Offset Temperature Ch 2~ |
R/W |
0x10AC |
Offset Temperature Ch 3~ |
R/W |
0x10EC |
Offset Temperature Ch 4~ |
R/W |
0x112C |
Offset Temperature Ch 5~ |
R/W |
0x116C |
Offset Temperature Ch 6~ |
R/W |
0x11AC |
Offset Temperature Ch 7~ |
R/W |
0x11EC |
Offset Temperature Ch 8~ |
R/W |
0x100C |
Thermocouple Type Ch 1 |
R/W |
0x104C |
Thermocouple Type Ch 2 |
R/W |
0x108C |
Thermocouple Type Ch 3 |
R/W |
0x10CC |
Thermocouple Type Ch 4 |
R/W |
0x110C |
Thermocouple Type Ch 5 |
R/W |
0x114C |
Thermocouple Type Ch 6 |
R/W |
0x118C |
Thermocouple Type Ch 7 |
R/W |
0x11CC |
Thermocouple Type Ch 8 |
R/W |
0x2004 |
Automatic Cold Junction Compensation Enable |
R/W |
0x1010 |
Compensation Type Ch 1 |
R/W |
0x1050 |
Compensation Type Ch 2 |
R/W |
0x1090 |
Compensation Type Ch 3 |
R/W |
0x10D0 |
Compensation Type Ch 4 |
R/W |
0x1110 |
Compensation Type Ch 5 |
R/W |
0x1150 |
Compensation Type Ch 6 |
R/W |
0x1190 |
Compensation Type Ch 7 |
R/W |
0x11D0 |
Compensation Type Ch 8 |
R/W |
0x1014 |
Compensation Temperature Ch 1~ |
R/W |
0x1054 |
Compensation Temperature Ch 2~ |
R/W |
0x1094 |
Compensation Temperature Ch 3~ |
R/W |
0x10D4 |
Compensation Temperature Ch 4~ |
R/W |
0x1114 |
Compensation Temperature Ch 5~ |
R/W |
0x1154 |
Compensation Temperature Ch 6~ |
R/W |
0x1194 |
Compensation Temperature Ch 7~ |
R/W |
0x11D4 |
Compensation Temperature Ch 8~ |
R/W |
0x2008 |
Suspend Background Operations |
R/W |
0x200C |
Run System Calibration |
R/W |
0x2010 |
Run Open-line check |
R/W |
0x2014 |
Run BIT |
R/W |
Temperature Threshold Detect Programming Registers
0x1018 |
Alert Temperature Low 1 Ch 1~ |
R/W |
0x1058 |
Alert Temperature Low 1 Ch 2~ |
R/W |
0x1098 |
Alert Temperature Low 1 Ch 3~ |
R/W |
0x10D8 |
Alert Temperature Low 1 Ch 4~ |
R/W |
0x1118 |
Alert Temperature Low 1 Ch 5~ |
R/W |
0x1158 |
Alert Temperature Low 1 Ch 6~ |
R/W |
0x1198 |
Alert Temperature Low 1 Ch 7~ |
R/W |
0x11D8 |
Alert Temperature Low 1 Ch 8~ |
R/W |
0x101C |
Alert Temperature Low 2 Ch 1~ |
R/W |
0x105C |
Alert Temperature Low 2 Ch 2~ |
R/W |
0x109C |
Alert Temperature Low 2 Ch 3~ |
R/W |
0x10DC |
Alert Temperature Low 2 Ch 4~ |
R/W |
0x111C |
Alert Temperature Low 2 Ch 5~ |
R/W |
0x115C |
Alert Temperature Low 2 Ch 6~ |
R/W |
0x119C |
Alert Temperature Low 2 Ch 7~ |
R/W |
0x11DC |
Alert Temperature Low 2 Ch 8~ |
R/W |
0x1020 |
Alert Temperature High 1 Ch 1~ |
R/W |
0x1060 |
Alert Temperature High 1 Ch 2~ |
R/W |
0x10A0 |
Alert Temperature High 1 Ch 3~ |
R/W |
0x10E0 |
Alert Temperature High 1 Ch 4~ |
R/W |
0x1120 |
Alert Temperature High 1 Ch 5~ |
R/W |
0x1160 |
Alert Temperature High 1 Ch 6~ |
R/W |
0x11A0 |
Alert Temperature High 1 Ch 7~ |
R/W |
0x11E0 |
Alert Temperature High 1 Ch 8~ |
R/W |
0x1024 |
Alert Temperature High 2 Ch 1~ |
R/W |
0x1064 |
Alert Temperature High 2 Ch 2~ |
R/W |
0x10A4 |
Alert Temperature High 2 Ch 3~ |
R/W |
0x10E4 |
Alert Temperature High 2 Ch 4~ |
R/W |
0x1124 |
Alert Temperature High 2 Ch 5~ |
R/W |
0x1164 |
Alert Temperature High 2 Ch 6~ |
R/W |
0x11A4 |
Alert Temperature High 2 Ch 7~ |
R/W |
0x11E4 |
Alert Temperature High 2 Ch 8~ |
R/W |
Module Common Registers
Refer to “Module Common Registers Module Manual” for the Module Common Registers Function Register Map.
Status Registers
0x02B0 |
Channel Status Enabled |
R/W |
BIT Status
0x0800 |
Dynamic Status |
R |
0x0804 |
Latched Status* |
R/W |
0x0808 |
Interrupt Enable |
R/W |
0x080C |
Set Edge/Level Interrupt |
R/W |
Open Line Status
0x0810 |
Dynamic Status |
R |
0x0814 |
Latched Status* |
R/W |
0x0818 |
Interrupt Enable |
R/W |
0x081C |
Set Edge/Level Interrupt |
R/W |
Temperature Alert Low 1 Status
0x0820 |
Dynamic Status |
R |
0x0824 |
Latched Status* |
R/W |
0x0828 |
Interrupt Enable |
R/W |
0x082C |
Set Edge/Level Interrupt |
R/W |
Temperature Alert Low 2 Status
0x0830 |
Dynamic Status |
R |
0x0834 |
Latched Status* |
R/W |
0x0838 |
Interrupt Enable |
R/W |
0x083C |
Set Edge/Level Interrupt |
R/W |
Temperature Alert High 1 Status
0x0840 |
Dynamic Status |
R |
0x0844 |
Latched Status* |
R/W |
0x0848 |
Interrupt Enable |
R/W |
0x084C |
Set Edge/Level Interrupt |
R/W |
Temperature Alert High 2 Status
0x0850 |
Dynamic Status |
R |
0x0854 |
Latched Status* |
R/W |
0x0858 |
Interrupt Enable |
R/W |
0x085C |
Set Edge/Level Interrupt |
R/W |
Summary Status
0x09A0 |
Dynamic Status |
R |
0x09A4 |
Latched Status* |
R/W |
0x09A8 |
Interrupt Enable |
R/W |
0x09AC |
Set Edge/Level Interrupt |
R/W |
Interrupt Registers
The Interrupt Vector and Interrupt Steering registers are located on the Motherboard Memory Space and do not require any Module Address Offsets. These registers are accessed using the absolute addresses listed in the table below.
0x0500 |
Module 1 Interrupt Vector 1 - BIT |
R/W |
0x0504 |
Module 1 Interrupt Vector 2 - Open |
R/W |
0x0508 |
Module 1 Interrupt Vector 3 - Temperature Alert Low 1 |
R/W |
0x050C |
Module 1 Interrupt Vector 4 - Temperature Alert Low 2 |
R/W |
0x0510 |
Module 1 Interrupt Vector 5 - Temperature Alert High 1 |
R/W |
0x0514 |
Module 1 Interrupt Vector 6 - Temperature Alert High 2 |
R/W |
0x0518 to 0x0564 |
Module 1 Interrupt Vector 7-26 - Reserved |
R/W |
0x0568 |
Module 1 Interrupt Vector 27 - Summary |
R/W |
0x056C to 0x057C |
Module 1 Interrupt Vector 28-32 - Reserved |
R/W |
0x0600 |
Module 1 Interrupt Steering 1 - BIT |
R/W |
0x0604 |
Module 1 Interrupt Steering 2 - Open |
R/W |
0x0608 |
Module 1 Interrupt Steering 3 - Temperature Alert Low 1 |
R/W |
0x060C |
Module 1 Interrupt Steering 4 - Temperature Alert Low 2 |
R/W |
0x0610 |
Module 1 Interrupt Steering 5 - Temperature Alert High 1 |
R/W |
0x0614 |
Module 1 Interrupt Steering 6 - Temperature Alert High 2 |
R/W |
0x0618 to 0x0664 |
Module 1 Interrupt Steering 7-26 - Reserved |
R/W |
0x0668 |
Module 1 Interrupt Steering 27 - Summary |
R/W |
0x066C to 0x067C |
Module 1 Interrupt Steering 28-32 - Reserved |
R/W |
0x0700 |
Module 2 Interrupt Vector 1 - BIT |
R/W |
0x0704 |
Module 2 Interrupt Vector 2 - Open |
R/W |
0x0708 |
Module 2 Interrupt Vector 3 - Temperature Alert Low 1 |
R/W |
0x070C |
Module 2 Interrupt Vector 4 - Temperature Alert Low 2 |
R/W |
0x0710 |
Module 2 Interrupt Vector 5 - Temperature Alert High 1 |
R/W |
0x0714 |
Module 2 Interrupt Vector 6 - Temperature Alert High 2 |
R/W |
0x0718 to 0x0264 |
Module 2 Interrupt Vector 7-26 - Reserved |
R/W |
0x0768 |
Module 2 Interrupt Vector 27 - Summary |
R/W |
0x076C to 0x077C |
Module 2 Interrupt Vector 28-32 - Reserved |
R/W |
0x0800 |
Module 2 Interrupt Steering 1 - BIT |
R/W |
0x0804 |
Module 2 Interrupt Steering 2 - Open |
R/W |
0x0808 |
Module 2 Interrupt Steering 3 - Temperature Alert Low 1 |
R/W |
0x080C |
Module 2 Interrupt Steering 4 - Temperature Alert Low 2 |
R/W |
0x0810 |
Module 2 Interrupt Steering 5 - Temperature Alert High 1 |
R/W |
0x0814 |
Module 2 Interrupt Steering 6 - Temperature Alert High 2 |
R/W |
0x0818 to 0x0864 |
Module 2 Interrupt Steering 7-26 - Reserved |
R/W |
0x0868 |
Module 2 Interrupt Steering 27 - Summary |
R/W |
0x086C to 0x087C |
Module 2 Interrupt Steering 28-32 - Reserved |
R/W |
0x0900 |
Module 3 Interrupt Vector 1 - BIT |
R/W |
0x0904 |
Module 3 Interrupt Vector 2 - Open |
R/W |
0x0908 |
Module 3 Interrupt Vector 3 - Temperature Alert Low 1 |
R/W |
0x090C |
Module 3 Interrupt Vector 4 - Temperature Alert Low 2 |
R/W |
0x0910 |
Module 3 Interrupt Vector 5 - Temperature Alert High 1 |
R/W |
0x0914 |
Module 3 Interrupt Vector 6 - Temperature Alert High 2 |
R/W |
0x0918 to 0x0964 |
Module 3 Interrupt Vector 7-26 - Reserved |
R/W |
0x0968 |
Module 3 Interrupt Vector 27 - Summary |
R/W |
0x096C to 0x097C |
Module 3 Interrupt Vector 28-32 - Reserved |
R/W |
0x0A00 |
Module 3 Interrupt Steering 1 - BIT |
R/W |
0x0A04 |
Module 3 Interrupt Steering 2 - Open |
R/W |
0x0A08 |
Module 3 Interrupt Steering 3 - Temperature Alert Low 1 |
R/W |
0x0A0C |
Module 3 Interrupt Steering 4 - Temperature Alert Low 2 |
R/W |
0x0A10 |
Module 3 Interrupt Steering 5 - Temperature Alert High 1 |
R/W |
0x0A14 |
Module 3 Interrupt Steering 6 - Temperature Alert High 2 |
R/W |
0x0A18 to 0x0A64 |
Module 3 Interrupt Steering 7-26 - Reserved |
R/W |
0x0A68 |
Module 3 Interrupt Steering 27 - Summary |
R/W |
0x0A6C to 0x0A7C |
Module 3 Interrupt Steering 28-32 - Reserved |
R/W |
0x0B00 |
Module 4 Interrupt Vector 1 - BIT |
R/W |
0x0B04 |
Module 4 Interrupt Vector 2 - Open |
R/W |
0x0B08 |
Module 4 Interrupt Vector 3 - Temperature Alert Low 1 |
R/W |
0x0B0C |
Module 4 Interrupt Vector 4 - Temperature Alert Low 2 |
R/W |
0x0B10 |
Module 4 Interrupt Vector 5 - Temperature Alert High 1 |
R/W |
0x0B14 |
Module 4 Interrupt Vector 6 - Temperature Alert High 2 |
R/W |
0x0B18 to 0x0B64 |
Module 4 Interrupt Vector 7-26 - Reserved |
R/W |
0x0B68 |
Module 4 Interrupt Vector 27 - Summary |
R/W |
0x0B6C to 0x0B7C |
Module 4 Interrupt Vector 28-32 - Reserved |
R/W |
0x0C00 |
Module 4 Interrupt Steering 1 - BIT |
R/W |
0x0C04 |
Module 4 Interrupt Steering 2 - Open |
R/W |
0x0C08 |
Module 4 Interrupt Steering 3 - Temperature Alert Low 1 |
R/W |
0x0C0C |
Module 4 Interrupt Steering 4 - Temperature Alert Low 2 |
R/W |
0x0C10 |
Module 4 Interrupt Steering 5 - Temperature Alert High 1 |
R/W |
0x0C14 |
Module 4 Interrupt Steering 6 - Temperature Alert High 2 |
R/W |
0x0C18 to 0x0C64 |
Module 4 Interrupt Steering 7-26 - Reserved |
R/W |
0x0C68 |
Module 4 Interrupt Steering 27 - Summary |
R/W |
0x0C6C to 0x0C7C |
Module 4 Interrupt Steering 28-32 - Reserved |
R/W |
0x0D00 |
Module 5 Interrupt Vector 1 - BIT |
R/W |
0x0D04 |
Module 5 Interrupt Vector 2 - Open |
R/W |
0x0D08 |
Module 5 Interrupt Vector 3 - Temperature Alert Low 1 |
R/W |
0x0D0C |
Module 5 Interrupt Vector 4 - Temperature Alert Low 2 |
R/W |
0x0D10 |
Module 5 Interrupt Vector 5 - Temperature Alert High 1 |
R/W |
0x0D14 |
Module 5 Interrupt Vector 6 - Temperature Alert High 2 |
R/W |
0x0D18 to 0x0D64 |
Module 5 Interrupt Vector 7-26 - Reserved |
R/W |
0x0D68 |
Module 5 Interrupt Vector 27 - Summary |
R/W |
0x0D6C to 0x0D7C |
Module 5 Interrupt Vector 28-32 - Reserved |
R/W |
0x0E00 |
Module 5 Interrupt Steering 1 - BIT |
R/W |
0x0E04 |
Module 5 Interrupt Steering 2 - Open |
R/W |
0x0E08 |
Module 5 Interrupt Steering 3 - Temperature Alert Low 1 |
R/W |
0x0E0C |
Module 5 Interrupt Steering 4 - Temperature Alert Low 2 |
R/W |
0x0E10 |
Module 5 Interrupt Steering 5 - Temperature Alert High 1 |
R/W |
0x0E14 |
Module 5 Interrupt Steering 6 - Temperature Alert High 2 |
R/W |
0x0E18 to 0x0E64 |
Module 5 Interrupt Steering 7-26 - Reserved |
R/W |
0x0E68 |
Module 5 Interrupt Steering 27 - Summary |
R/W |
0x0E6C to 0x0E7C |
Module 5 Interrupt Steering 28-32 - Reserved |
R/W |
0x0F00 |
Module 6 Interrupt Vector 1 - BIT |
R/W |
0x0F04 |
Module 6 Interrupt Vector 2 - Open |
R/W |
0x0F08 |
Module 6 Interrupt Vector 3 - Temperature Alert Low 1 |
R/W |
0x0F0C |
Module 6 Interrupt Vector 4 - Temperature Alert Low 2 |
R/W |
0x0F10 |
Module 6 Interrupt Vector 5 - Temperature Alert High 1 |
R/W |
0x0F14 |
Module 6 Interrupt Vector 6 - Temperature Alert High 2 |
R/W |
0x0F18 to 0x0F64 |
Module 6 Interrupt Vector 7-26 - Reserved |
R/W |
0x0F68 |
Module 6 Interrupt Vector 27 - Summary |
R/W |
0x0F6C to 0x0F7C |
Module 6 Interrupt Vector 28-32 - Reserved |
R/W |
0x1000 |
Module 6 Interrupt Steering 1 - BIT |
R/W |
0x1004 |
Module 6 Interrupt Steering 2 - Open |
R/W |
0x1008 |
Module 6 Interrupt Steering 3 - Temperature Alert Low 1 |
R/W |
0x100C |
Module 6 Interrupt Steering 4 - Temperature Alert Low 2 |
R/W |
0x1010 |
Module 6 Interrupt Steering 5 - Temperature Alert High 1 |
R/W |
0x1014 |
Module 6 Interrupt Steering 6 - Temperature Alert High 2 |
R/W |
0x1018 to 0x1064 |
Module 6 Interrupt Steering 7-26 - Reserved |
R/W |
0x1068 |
Module 6 Interrupt Steering 27 - Summary |
R/W |
0x106C to 0x107C |
Module 6 Interrupt Steering 28-32 - Reserved |
R/W |
APPENDIX A: OPTIONAL EXTERNAL COLD JUNCTION COMPENSATION (CJC) BLOCK ACCESSORY
Thermocouple applications require an interface from the base motherboard/module to the thermocouple wires, providing a transition from the thermocouple wires to conventional (copper) wiring for the measurement. Conventional wiring (copper), when connected to the thermocouple wire, will create a junction of dissimilar metals. When a junction of dissimilar metals occurs at temperatures other than a standard 0.0 deg C, there will be an additional voltage gradient developed, acting as an additional thermocouple, and affecting the reading of the primary thermocouple. Compensation is required for this temperature delta offset. The effect of the junction temperature needs to be factored into the measurement to provide the correct readings. The effects of the temperature reading on the measurement is not a direct arithmetic correction due to the nonlinear response characteristics of thermocouples. The compensation calculations involve the thermocouple type and the temperature measurement points.
The primary purpose of the isothermal block is to provide a consistent temperature environment for the terminal blocks connecting thermocouple wires to the system interface to the motherboard/module and provides the measurement of the junction temperature. This allows the cold junction compensation temperature to be done automatically. The isothermal block contains an RTD temperature sensor and is constructed to minimize temperature variances between channels and the isothermal block itself. The sensor is read by a designated RTD channel (Ch.8) to allow automatic compensation with the junction temperature measurement.
The NAI P/N ACC-ISO-THERM-BLK2 is a semi-rugged, non-sealed housing designed with terminals to secure up to 7 thermocouple interconnects (one for each available channel of the TC1). It is designed to be mounted/secured to a “cold plate” (surface/mass that is expected to maintain a relatively stable and constant temperature over time). The isothermal block has an embedded Pt100 RTD temperature sensor for measurement of the junction temperature. The TC1 module, when programmed for external block compensation mode, will utilize this reference temperature reading and provide automatic thermocouple measurement compensation based on the temperature reading of the sensor.
APPENDIX B: THERMOCOUPLE TYPE TEMPERATURE TOLERANCES
Tolerance contribution from measurement tolerances of +/-25µV, independent of tolerance contributions of cold junction compensation and individual TC sensors.
APPENDIX C: PIN-OUT DETAILS
Pin-out details (for reference) are shown below, with respect to DATAIO. Additional information on pin-outs can be found in the Motherboard Operational Manuals.
Module Signal (Ref Only) |
Thermocouple (TC1) |
DATIO1 |
SENSE+_CH1 |
DATIO2 |
SENSE-_CH1 |
DATIO3 |
|
DATIO4 |
|
DATIO5 |
|
DATIO6 |
|
DATIO7 |
SENSE+_CH2 |
DATIO8 |
SENSE-_CH2 |
DATIO9 |
SENSE+_CH3 |
DATIO10 |
SENSE-_CH3 |
DATIO11 |
|
DATIO12 |
|
DATIO13 |
SENSE+_CH5 |
DATIO14 |
SENSE-_CH5 |
DATIO15 |
|
DATIO16 |
|
DATIO17 |
|
DATIO18 |
|
DATIO19 |
SENSE+_CH6 |
DATIO20 |
SENSE-_CH6 |
DATIO21 |
SENSE+_CH7 |
DATIO22 |
SENSE-_CH7 |
DATIO23 |
|
DATIO24 |
|
DATIO25 |
|
DATIO26 |
|
DATIO27 |
SENSE+_CH4 |
DATIO28 |
SENSE-_CH4 |
DATIO29 |
DRIVE+_CH8 |
DATIO30 |
DRIVE-_CH8 |
DATIO31 |
SENSE+_CH8 |
DATIO32 |
SENSE-_CH8 |
DATIO33 |
|
DATIO34 |
|
DATIO35 |
|
DATIO36 |
|
DATIO37 |
|
DATIO38 |
|
DATIO39 |
|
DATIO40 |
|
N/A |
STATUS AND INTERRUPTS
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Status registers indicate the detection of faults or events. The status registers can be channel bit-mapped or event bit-mapped. An example of a channel bit-mapped register is the BIT status register, and an example of an event bit-mapped register is the FIFO status register.
For those status registers that allow interrupts to be generated upon the detection of the fault or the event, there are four registers associated with each status: Dynamic, Latched, Interrupt Enabled, and Set Edge/Level Interrupt.
Dynamic Status: The Dynamic Status register indicates the current condition of the fault or the event. If the fault or the event is momentary, the contents in this register will be clear when the fault or the event goes away. The Dynamic Status register can be polled, however, if the fault or the event is sporadic, it is possible for the indication of the fault or the event to be missed.
Latched Status: The Latched Status register indicates whether the fault or the event has occurred and keeps the state until it is cleared by the user. Reading the Latched Status register is a better alternative to polling the Dynamic Status register because the contents of this register will not clear until the user commands to clear the specific bit(s) associated with the fault or the event in the Latched Status register. Once the status register has been read, the act of writing a 1 back to the applicable status register to any specific bit (channel/event) location will “clear” the bit (set the bit to 0). When clearing the channel/event bits, it is strongly recommended to write back the same bit pattern as read from the Latched Status register. For example, if the channel bit-mapped Latched Status register contains the value 0x0000 0005, which indicates fault/event detection on channel 1 and 3, write the value 0x0000 0005 to the Latched Status register to clear the fault/event status for channel 1 and 3. Writing a “1” to other channels that are not set (example 0x0000 000F) may result in incorrectly “clearing” incoming faults/events for those channels (example, channel 2 and 4).
Interrupt Enable: If interrupts are preferred upon the detection of a fault or an event, enable the specific channel/event interrupt in the Interrupt Enable register. The bits in Interrupt Enable register map to the same bits in the Latched Status register. When a fault or event occurs, an interrupt will be fired. Subsequent interrupts will not trigger until the application acknowledges the fired interrupt by clearing the associated channel/event bit in the Latched Status register. If the interruptible condition is still persistent after clearing the bit, this may retrigger the interrupt depending on the Edge/Level setting.
Set Edge/Level Interrupt: When interrupts are enabled, the condition on retriggering the interrupt after the Latch Register is “cleared” can be specified as “edge” triggered or “level” triggered. Note, the Edge/Level Trigger also affects how the Latched Register value is adjusted after it is “cleared” (see below).
-
Edge triggered: An interrupt will be retriggered when the Latched Status register change from low (0) to high (1) state. Uses for edgetriggered interrupts would include transition detections (Low-to-High transitions, High-to-Low transitions) or fault detections. After “clearing” an interrupt, another interrupt will not occur until the next transition or the re-occurrence of the fault again.
-
Level triggered: An interrupt will be generated when the Latched Status register remains at the high (1) state. Level-triggered interrupts are used to indicate that something needs attention.
Interrupt Vector and Steering
When interrupts are enabled, the interrupt vector associated with the specific interrupt can be programmed with a unique number/identifier defined by the user such that it can be utilized in the Interrupt Service Routine (ISR) to identify the type of interrupt. When an interrupt occurs, the contents of the Interrupt Vector registers is reported as part of the interrupt mechanism. In addition to specifying the interrupt vector, the interrupt can be directed (“steered”) to the native bus or to the application running on the onboard ARM processor.
Interrupt Trigger Types
In most applications, limiting the number of interrupts generated is preferred as interrupts are costly, thus choosing the correct Edge/Level interrupt trigger to use is important.
Example 1: Fault detection
This example illustrates interrupt considerations when detecting a fault like an “open” on a line. When an “open” is detected, the system will receive an interrupt. If the “open” on the line is persistent and the trigger is set to “edge”, upon “clearing” the interrupt, the system will not regenerate another interrupt. If, instead, the trigger is set to “level”, upon “clearing” the interrupt, the system will re-generate another interrupt. Thus, in this case, it will be better to set the trigger type to “edge”.
Example 2: Threshold detection
This example illustrates interrupt considerations when detecting an event like reaching or exceeding the “high watermark” threshold value. In a communication device, when the number of elements received in the FIFO reaches the high-watermark threshold, an interrupt will be generated. Normally, the application would read the count of the number of elements in the FIFO and read this number of elements from the FIFO. After reading the FIFO data, the application would “clear” the interrupt. If the trigger type is set to “edge”, another interrupt will be generated only if the number of elements in FIFO goes below the “high watermark” after the “clearing” the interrupt and then fills up to reach the “high watermark” threshold value. Since receiving communication data is inherently asynchronous, it is possible that data can continue to fill the FIFO as the application is pulling data off the FIFO. If, at the time the interrupt is “cleared”, the number of elements in the FIFO is at or above the “high watermark”, no interrupts will be generated. In this case, it will be better to set the trigger type to “level”, as the purpose here is to make sure that the FIFO is serviced when the number of elements exceeds the high watermark threshold value. Thus, upon “clearing” the interrupt, if the number of elements in the FIFO is at or above the “high watermark” threshold value, another interrupt will be generated indicating that the FIFO needs to be serviced.
Dynamic and Latched Status Registers Examples
The examples in this section illustrate the differences in behavior of the Dynamic Status and Latched Status registers as well as the differences in behavior of Edge/Level Trigger when the Latched Status register is cleared.
Figure 1. Example of Module’s Channel-Mapped Dynamic and Latched Status States
No Clearing of Latched Status |
Clearing of Latched Status (Edge-Triggered) |
Clearing of Latched Status (Level-Triggered) |
||||
Time |
Dynamic Status |
Latched Status |
Action |
Latched Status |
Action |
Latched |
T0 |
0x0 |
0x0 |
Read Latched Register |
0x0 |
Read Latched Register |
0x0 |
T1 |
0x1 |
0x1 |
Read Latched Register |
0x1 |
0x1 |
|
Write 0x1 to Latched Register |
Write 0x1 to Latched Register |
|||||
0x0 |
0x1 |
|||||
T2 |
0x0 |
0x1 |
Read Latched Register |
0x0 |
Read Latched Register |
0x1 |
Write 0x1 to Latched Register |
||||||
0x0 |
||||||
T3 |
0x2 |
0x3 |
Read Latched Register |
0x2 |
Read Latched Register |
0x2 |
Write 0x2 to Latched Register |
Write 0x2 to Latched Register |
|||||
0x0 |
0x2 |
|||||
T4 |
0x2 |
0x3 |
Read Latched Register |
0x1 |
Read Latched Register |
0x3 |
Write 0x1 to Latched Register |
Write 0x3 to Latched Register |
|||||
0x0 |
0x2 |
|||||
T5 |
0xC |
0xF |
Read Latched Register |
0xC |
Read Latched Register |
0xE |
Write 0xC to Latched Register |
Write 0xE to Latched Register |
|||||
0x0 |
0xC |
|||||
T6 |
0xC |
0xF |
Read Latched Register |
0x0 |
Read Latched |
0xC |
Write 0xC to Latched Register |
||||||
0xC |
||||||
T7 |
0x4 |
0xF |
Read Latched Register |
0x0 |
Read Latched Register |
0xC |
Write 0xC to Latched Register |
||||||
0x4 |
||||||
T8 |
0x4 |
0xF |
Read Latched Register |
0x0 |
Read Latched Register |
0x4 |
Interrupt Examples
The examples in this section illustrate the interrupt behavior with Edge/Level Trigger.
Figure 2. Illustration of Latched Status State for Module with 4-Channels with Interrupt Enabled
Time |
Latched Status (Edge-Triggered – Clear Multi-Channel) |
Latched Status (Edge-Triggered – Clear Single Channel) |
Latched Status (Level-Triggered – Clear Multi-Channel) |
|||
Action |
Latched |
Action |
Latched |
Action |
Latched |
|
T1 (Int 1) |
Interrupt Generated Read Latched Registers |
0x1 |
Interrupt Generated Read Latched Registers |
0x1 |
Interrupt Generated Read Latched Registers |
0x1 |
Write 0x1 to Latched Register |
Write 0x1 to Latched Register |
Write 0x1 to Latched Register |
||||
0x0 |
0x0 |
Interrupt re-triggers Note, interrupt re-triggers after each clear until T2. |
0x1 |
|||
T3 (Int 2) |
Interrupt Generated Read Latched Registers |
0x2 |
Interrupt Generated Read Latched Registers |
0x2 |
Interrupt Generated Read Latched Registers |
0x2 |
Write 0x2 to Latched Register |
Write 0x2 to Latched Register |
Write 0x2 to Latched Register |
||||
0x0 |
0x0 |
Interrupt re-triggers Note, interrupt re-triggers after each clear until T7. |
0x2 |
|||
T4 (Int 3) |
Interrupt Generated Read Latched Registers |
0x1 |
Interrupt Generated Read Latched Registers |
0x1 |
Interrupt Generated Read Latched Registers |
0x3 |
Write 0x1 to Latched Register |
Write 0x1 to Latched Register |
Write 0x3 to Latched Register |
||||
0x0 |
0x0 |
Interrupt re-triggers Note, interrupt re-triggers after each clear and 0x3 is reported in Latched Register until T5. |
0x3 |
|||
Interrupt re-triggers Note, interrupt re-triggers after each clear until T7. |
0x2 |
|||||
T6 (Int 4) |
Interrupt Generated Read Latched Registers |
0xC |
Interrupt Generated Read Latched Registers |
0xC |
Interrupt Generated Read Latched Registers |
0xE |
Write 0xC to Latched Register |
Write 0x4 to Latched Register |
Write 0xE to Latched Register |
||||
0x0 |
Interrupt re-triggers Write 0x8 to Latched Register |
0x8 |
Interrupt re-triggers Note, interrupt re-triggers after each clear and 0xE is reported in Latched Register until T7. |
0xE |
||
0x0 |
Interrupt re-triggers Note, interrupt re-triggers after each clear and 0xC is reported in Latched Register until T8. |
0xC |
||||
Interrupt re-triggers Note, interrupt re-triggers after each clear and 0x4 is reported in Latched Register always. |
0x4 |
MODULE COMMON REGISTERS
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The registers described in this document are common to all NAI Generation 5 modules.
Module Information Registers
The registers in this section provide module information such as firmware revisions, capabilities and unique serial number information.
FPGA Version Registers
The FPGA firmware version registers include registers that contain the Revision, Compile Timestamp, SerDes Revision, Template Revision and Zynq Block Revision information.
FPGA Revision
Function: FPGA firmware revision
Type: unsigned binary word (32-bit)
Data Range: 0x0000 0000 to 0xFFFF FFFF
Read/Write: R
Initialized Value: Value corresponding to the revision of the board’s FPGA
Operational Settings: The upper 16-bits are the major revision and the lower 16-bits are the minor revision.
D31 |
D30 |
D29 |
D28 |
D27 |
D26 |
D25 |
D24 |
D23 |
D22 |
D21 |
D20 |
D19 |
D18 |
D17 |
D16 |
Major Revision Number |
|||||||||||||||
D15 |
D14 |
D13 |
D12 |
D11 |
D10 |
D9 |
D8 |
D7 |
D6 |
D5 |
D4 |
D3 |
D2 |
D1 |
D0 |
Minor Revision Number |
FPGA Compile Timestamp
Function: Compile Timestamp for the FPGA firmware.
Type: unsigned binary word (32-bit)
Data Range: N/A
Read/Write: R
Initialized Value: Value corresponding to the compile timestamp of the board’s FPGA
Operational Settings: The 32-bit value represents the Day, Month, Year, Hour, Minutes and Seconds as formatted in the table:
D31 |
D30 |
D29 |
D28 |
D27 |
D26 |
D25 |
D24 |
D23 |
D22 |
D21 |
D20 |
D19 |
D18 |
D17 |
D16 |
day (5-bits) |
month (4-bits) |
year (6-bits) |
hr |
||||||||||||
D15 |
D14 |
D13 |
D12 |
D11 |
D10 |
D9 |
D8 |
D7 |
D6 |
D5 |
D4 |
D3 |
D2 |
D1 |
D0 |
hour (5-bits) |
minutes (6-bits) |
seconds (6-bits) |
FPGA SerDes Revision
Function: FPGA SerDes revision
Type: unsigned binary word (32-bit)
Data Range: 0x0000 0000 to 0xFFFF FFFF
Read/Write: R
Initialized Value: Value corresponding to the SerDes revision of the board’s FPGA
Operational Settings: The upper 16-bits are the major revision, and the lower 16-bits are the minor revision.
D31 |
D30 |
D29 |
D28 |
D27 |
D26 |
D25 |
D24 |
D23 |
D22 |
D21 |
D20 |
D19 |
D18 |
D17 |
D16 |
Major Revision Number |
|||||||||||||||
D15 |
D14 |
D13 |
D12 |
D11 |
D10 |
D9 |
D8 |
D7 |
D6 |
D5 |
D4 |
D3 |
D2 |
D1 |
D0 |
Minor Revision Number |
FPGA Template Revision
Function: FPGA Template revision
Type: unsigned binary word (32-bit)
Data Range: 0x0000 0000 to 0xFFFF FFFF
Read/Write: R
Initialized Value: Value corresponding to the template revision of the board’s FPGA
Operational Settings: The upper 16-bits are the major revision, and the lower 16-bits are the minor revision.
D31 |
D30 |
D29 |
D28 |
D27 |
D26 |
D25 |
D24 |
D23 |
D22 |
D21 |
D20 |
D19 |
D18 |
D17 |
D16 |
Major Revision Number |
|||||||||||||||
D15 |
D14 |
D13 |
D12 |
D11 |
D10 |
D9 |
D8 |
D7 |
D6 |
D5 |
D4 |
D3 |
D2 |
D1 |
D0 |
Minor Revision Number |
FPGA Zynq Block Revision
Function: FPGA Zynq Block revision
Type: unsigned binary word (32-bit)
Data Range: 0x0000 0000 to 0xFFFF FFFF
Read/Write: R
Initialized Value: Value corresponding to the Zynq block revision of the board’s FPGA
Operational Settings: The upper 16-bits are the major revision, and the lower 16-bits are the minor revision.
D31 |
D30 |
D29 |
D28 |
D27 |
D26 |
D25 |
D24 |
D23 |
D22 |
D21 |
D20 |
D19 |
D18 |
D17 |
D16 |
Major Revision Number |
|||||||||||||||
D15 |
D14 |
D13 |
D12 |
D11 |
D10 |
D9 |
D8 |
D7 |
D6 |
D5 |
D4 |
D3 |
D2 |
D1 |
D0 |
Minor Revision Number |
Bare Metal Version Registers
The Bare Metal firmware version registers include registers that contain the Revision and Compile Time information.
Bare Metal Revision
Function: Bare Metal firmware revision
Type: unsigned binary word (32-bit)
Data Range: 0x0000 0000 to 0xFFFF FFFF
Read/Write: R
Initialized Value: Value corresponding to the revision of the board’s Bare Metal
Operational Settings: The upper 16-bits are the major revision and the lower 16-bits are the minor revision.
D31 |
D30 |
D29 |
D28 |
D27 |
D26 |
D25 |
D24 |
D23 |
D22 |
D21 |
D20 |
D19 |
D18 |
D17 |
D16 |
Major Revision Number |
|||||||||||||||
D15 |
D14 |
D13 |
D12 |
D11 |
D10 |
D9 |
D8 |
D7 |
D6 |
D5 |
D4 |
D3 |
D2 |
D1 |
D0 |
Minor Revision Number |
Bare Metal Compile Time
Function: Provides an ASCII representation of the Date/Time for the Bare Metal compile time.
Type: 24-character ASCII string - Six (6) unsigned binary word (32-bit)
Data Range: N/A
Read/Write: R
Initialized Value: Value corresponding to the ASCII representation of the compile time of the board’s Bare Metal
Operational Settings: The six 32-bit words provide an ASCII representation of the Date/Time. The hexadecimal values in the field below represent: May 17 2019 at 15:38:32
Word 1 (Ex. 0x2079614D) |
|||||||||||||||
D31 |
D30 |
D29 |
D28 |
D27 |
D26 |
D25 |
D24 |
D23 |
D22 |
D21 |
D20 |
D19 |
D18 |
D17 |
D16 |
Space (0x20) |
Month ('y' - 0x79) |
||||||||||||||
D15 |
D14 |
D13 |
D12 |
D11 |
D10 |
D9 |
D8 |
D7 |
D6 |
D5 |
D4 |
D3 |
D2 |
D1 |
D0 |
Month ('a' - 0x61) |
Month ('M' - 0x4D) |
||||||||||||||
Word 2 (Ex. 0x32203731) |
|||||||||||||||
D31 |
D30 |
D29 |
D28 |
D27 |
D26 |
D25 |
D24 |
D23 |
D22 |
D21 |
D20 |
D19 |
D18 |
D17 |
D16 |
Year ('2' - 0x32) |
Space (0x20) |
||||||||||||||
D15 |
D14 |
D13 |
D12 |
D11 |
D10 |
D9 |
D8 |
D7 |
D6 |
D5 |
D4 |
D3 |
D2 |
D1 |
D0 |
Day ('7' - 0x37) |
Day ('1' - 0x31) |
||||||||||||||
Word 3 (Ex. 0x20393130) |
|||||||||||||||
D31 |
D30 |
D29 |
D28 |
D27 |
D26 |
D25 |
D24 |
D23 |
D22 |
D21 |
D20 |
D19 |
D18 |
D17 |
D16 |
Space (0x20) |
Year ('9' - 0x39) |
||||||||||||||
D15 |
D14 |
D13 |
D12 |
D11 |
D10 |
D9 |
D8 |
D7 |
D6 |
D5 |
D4 |
D3 |
D2 |
D1 |
D0 |
Year ('1' - 0x31) |
Year ('0' - 0x30) |
||||||||||||||
Word 4 (Ex. 0x31207461) |
|||||||||||||||
D31 |
D30 |
D29 |
D28 |
D27 |
D26 |
D25 |
D24 |
D23 |
D22 |
D21 |
D20 |
D19 |
D18 |
D17 |
D16 |
Hour ('1' - 0x31) |
Space (0x20) |
||||||||||||||
D15 |
D14 |
D13 |
D12 |
D11 |
D10 |
D9 |
D8 |
D7 |
D6 |
D5 |
D4 |
D3 |
D2 |
D1 |
D0 |
'a' (0x74) |
't' (0x61) |
||||||||||||||
Word 5 (Ex. 0x38333A35) |
|||||||||||||||
D31 |
D30 |
D29 |
D28 |
D27 |
D26 |
D25 |
D24 |
D23 |
D22 |
D21 |
D20 |
D19 |
D18 |
D17 |
D16 |
Minute ('8' - 0x38) |
Minute ('3' - 0x33) |
||||||||||||||
D15 |
D14 |
D13 |
D12 |
D11 |
D10 |
D9 |
D8 |
D7 |
D6 |
D5 |
D4 |
D3 |
D2 |
D1 |
D0 |
':' (0x3A) |
Hour ('5' - 0x35) |
||||||||||||||
Word 6 (Ex. 0x0032333A) |
|||||||||||||||
D31 |
D30 |
D29 |
D28 |
D27 |
D26 |
D25 |
D24 |
D23 |
D22 |
D21 |
D20 |
D19 |
D18 |
D17 |
D16 |
NULL (0x00) |
Seconds ('2' - 0x32) |
||||||||||||||
D15 |
D14 |
D13 |
D12 |
D11 |
D10 |
D9 |
D8 |
D7 |
D6 |
D5 |
D4 |
D3 |
D2 |
D1 |
D0 |
Seconds ('3' - 0x33) |
':' (0x3A) |
FSBL Version Registers
The FSBL version registers include registers that contain the Revision and Compile Time information for the First Stage Boot Loader (FSBL).
FSBL Revision
Function: FSBL firmware revision
Type: unsigned binary word (32-bit)
Data Range: 0x0000 0000 to 0xFFFF FFFF
Read/Write: R
Initialized Value: Value corresponding to the revision of the board’s FSBL
Operational Settings: The upper 16-bits are the major revision, and the lower 16-bits are the minor revision.
D31 |
D30 |
D29 |
D28 |
D27 |
D26 |
D25 |
D24 |
D23 |
D22 |
D21 |
D20 |
D19 |
D18 |
D17 |
D16 |
Major Revision Number |
|||||||||||||||
D15 |
D14 |
D13 |
D12 |
D11 |
D10 |
D9 |
D8 |
D7 |
D6 |
D5 |
D4 |
D3 |
D2 |
D1 |
D0 |
Minor Revision Number |
FSBL Compile Time
Function: Provides an ASCII representation of the Date/Time for the FSBL compile time.
Type: 24-character ASCII string - Six (6) unsigned binary word (32-bit)
Data Range: N/A
Read/Write: R
Initialized Value: Value corresponding to the ASCII representation of the Compile Time of the board’s FSBL
Operational Settings: The six 32-bit words provide an ASCII representation of the Date/Time.
The hexadecimal values in the field below represent: May 17 2019 at 15:38:32
Word 1 (Ex. 0x2079614D) |
|||||||||||||||
D31 |
D30 |
D29 |
D28 |
D27 |
D26 |
D25 |
D24 |
D23 |
D22 |
D21 |
D20 |
D19 |
D18 |
D17 |
D16 |
Space (0x20) |
Month ('y' - 0x79) |
||||||||||||||
D15 |
D14 |
D13 |
D12 |
D11 |
D10 |
D9 |
D8 |
D7 |
D6 |
D5 |
D4 |
D3 |
D2 |
D1 |
D0 |
Month ('a' - 0x61) |
Month ('M' - 0x4D) |
||||||||||||||
Word 2 (Ex. 0x32203731) |
|||||||||||||||
D31 |
D30 |
D29 |
D28 |
D27 |
D26 |
D25 |
D24 |
D23 |
D22 |
D21 |
D20 |
D19 |
D18 |
D17 |
D16 |
Year ('2' - 0x32) |
Space (0x20) |
||||||||||||||
D15 |
D14 |
D13 |
D12 |
D11 |
D10 |
D9 |
D8 |
D7 |
D6 |
D5 |
D4 |
D3 |
D2 |
D1 |
D0 |
Day ('7' - 0x37) |
Day ('1' - 0x31) |
||||||||||||||
Word 3 (Ex. 0x20393130) |
|||||||||||||||
D31 |
D30 |
D29 |
D28 |
D27 |
D26 |
D25 |
D24 |
D23 |
D22 |
D21 |
D20 |
D19 |
D18 |
D17 |
D16 |
Space (0x20) |
Year ('9' - 0x39) |
||||||||||||||
D15 |
D14 |
D13 |
D12 |
D11 |
D10 |
D9 |
D8 |
D7 |
D6 |
D5 |
D4 |
D3 |
D2 |
D1 |
D0 |
Year ('1' - 0x31) |
Year ('0' - 0x30) |
||||||||||||||
Word 4 (Ex. 0x31207461) |
|||||||||||||||
D31 |
D30 |
D29 |
D28 |
D27 |
D26 |
D25 |
D24 |
D23 |
D22 |
D21 |
D20 |
D19 |
D18 |
D17 |
D16 |
Hour ('1' - 0x31) |
Space (0x20) |
||||||||||||||
D15 |
D14 |
D13 |
D12 |
D11 |
D10 |
D9 |
D8 |
D7 |
D6 |
D5 |
D4 |
D3 |
D2 |
D1 |
D0 |
'a' (0x74) |
't' (0x61) |
||||||||||||||
Word 5 (Ex. 0x38333A35) |
|||||||||||||||
D31 |
D30 |
D29 |
D28 |
D27 |
D26 |
D25 |
D24 |
D23 |
D22 |
D21 |
D20 |
D19 |
D18 |
D17 |
D16 |
Minute ('8' - 0x38) |
Minute ('3' - 0x33) |
||||||||||||||
D15 |
D14 |
D13 |
D12 |
D11 |
D10 |
D9 |
D8 |
D7 |
D6 |
D5 |
D4 |
D3 |
D2 |
D1 |
D0 |
':' (0x3A) |
Hour ('5' - 0x35) |
||||||||||||||
Word 6 (Ex. 0x0032333A) |
|||||||||||||||
D31 |
D30 |
D29 |
D28 |
D27 |
D26 |
D25 |
D24 |
D23 |
D22 |
D21 |
D20 |
D19 |
D18 |
D17 |
D16 |
NULL (0x00) |
Seconds ('2' - 0x32) |
||||||||||||||
D15 |
D14 |
D13 |
D12 |
D11 |
D10 |
D9 |
D8 |
D7 |
D6 |
D5 |
D4 |
D3 |
D2 |
D1 |
D0 |
Seconds ('3' - 0x33) |
':' (0x3A) |
Module Serial Number Registers
The Module Serial Number registers include registers that contain the Serial Numbers for the Interface Board and the Functional Board of the module.
Interface Board Serial Number
Function: Unique 128-bit identifier used to identify the interface board.
Type: 16-character ASCII string - Four (4) unsigned binary words (32-bit)
Data Range: N/A
Read/Write: R
Initialized Value: Serial number of the interface board
Operational Settings: This register is for information purposes only.
Functional Board Serial Number
Function: Unique 128-bit identifier used to identify the functional board.
Type: 16-character ASCII string - Four (4) unsigned binary words (32-bit)
Data Range: N/A
Read/Write: R
Initialized Value: Serial number of the functional board
Operational Settings: This register is for information purposes only.
Module Capability
Function: Provides indication for whether or not the module can support the following: SerDes block reads, SerDes FIFO block reads, SerDes packing (combining two 16-bit values into one 32-bit value) and floating point representation. The purpose for block access and packing is to improve the performance of accessing larger amounts of data over the SerDes interface.
Type: unsigned binary word (32-bit)
Data Range: 0x0000 0000 to 0x0000 0107
Read/Write: R
Initialized Value: 0x0000 0103
Operational Settings: A “1” in the bit associated with the capability indicates that it is supported.
D31 |
D30 |
D29 |
D28 |
D27 |
D26 |
D25 |
D24 |
D23 |
D22 |
D21 |
D20 |
D19 |
D18 |
D17 |
D16 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
D15 |
D14 |
D13 |
D12 |
D11 |
D10 |
D9 |
D8 |
D7 |
D6 |
D5 |
D4 |
D3 |
D2 |
D1 |
D0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
Flt-Pt |
0 |
0 |
0 |
0 |
0 |
Pack |
FIFO Blk |
Blk |
Module Memory Map Revision
Function: Module Memory Map revision
Type: unsigned binary word (32-bit)
Data Range: 0x0000 0000 to 0xFFFF FFFF
Read/Write: R
Initialized Value: Value corresponding to the Module Memory Map Revision
Operational Settings: The upper 16-bits are the major revision and the lower 16-bits are the minor revision.
D31 |
D30 |
D29 |
D28 |
D27 |
D26 |
D25 |
D24 |
D23 |
D22 |
D21 |
D20 |
D19 |
D18 |
D17 |
D16 |
Major Revision Number |
|||||||||||||||
D15 |
D14 |
D13 |
D12 |
D11 |
D10 |
D9 |
D8 |
D7 |
D6 |
D5 |
D4 |
D3 |
D2 |
D1 |
D0 |
Minor Revision Number |
Module Measurement Registers
The registers in this section provide module temperature measurement information.
Temperature Readings Registers
The temperature registers provide the current, maximum (from power-up) and minimum (from power-up) Zynq and PCB temperatures.
Interface Board Current Temperature
Function: Measured PCB and Zynq Core temperatures on Interface Board.
Type: signed byte (8-bits) for PCB and signed byte (8-bits) for Zynq core temperatures
Data Range: 0x0000 0000 to 0x0000 FFFF
Read/Write: R
Initialized Value: Value corresponding to the measured PCB and Zynq core temperatures based on the table below
Operational Settings: The upper 16-bits are not used, and the lower 16-bits are the PCB and Zynq Core Temperatures. For example, if the register contains the value 0x0000 202C, this represents PCB Temperature = 32° Celsius and Zynq Temperature = 44° Celsius.
D31 |
D30 |
D29 |
D28 |
D27 |
D26 |
D25 |
D24 |
D23 |
D22 |
D21 |
D20 |
D19 |
D18 |
D17 |
D16 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
D15 |
D14 |
D13 |
D12 |
D11 |
D10 |
D9 |
D8 |
D7 |
D6 |
D5 |
D4 |
D3 |
D2 |
D1 |
D0 |
PCB Temperature |
Zynq Core Temperature |
Functional Board Current Temperature
Function: Measured PCB temperature on Functional Board.
Type: signed byte (8-bits) for PCB
Data Range: 0x0000 0000 to 0x0000 00FF
Read/Write: R
Initialized Value: Value corresponding to the measured PCB on the table below
Operational Settings: The upper 24-bits are not used, and the lower 8-bits are the PCB Temperature. For example, if the register contains the value 0x0000 0019, this represents PCB Temperature = 25° Celsius.
D31 |
D30 |
D29 |
D28 |
D27 |
D26 |
D25 |
D24 |
D23 |
D22 |
D21 |
D20 |
D19 |
D18 |
D17 |
D16 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
D15 |
D14 |
D13 |
D12 |
D11 |
D10 |
D9 |
D8 |
D7 |
D6 |
D5 |
D4 |
D3 |
D2 |
D1 |
D0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
PCB Temperature |
Interface Board Maximum Temperature
Function: Maximum PCB and Zynq Core temperatures on Interface Board since power-on.
Type: signed byte (8-bits) for PCB and signed byte (8-bits) for Zynq core temperatures
Data Range: 0x0000 0000 to 0x0000 FFFF
Read/Write: R
Initialized Value: Value corresponding to the maximum measured PCB and Zynq core temperatures since power-on based on the table below
Operational Settings: The upper 16-bits are not used, and the lower 16-bits are the maximum PCB and Zynq Core Temperatures. For example, if the register contains the value 0x0000 5569, this represents maximum PCB Temperature = 85° Celsius and maximum Zynq Temperature = 105° Celsius.
D31 |
D30 |
D29 |
D28 |
D27 |
D26 |
D25 |
D24 |
D23 |
D22 |
D21 |
D20 |
D19 |
D18 |
D17 |
D16 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
D15 |
D14 |
D13 |
D12 |
D11 |
D10 |
D9 |
D8 |
D7 |
D6 |
D5 |
D4 |
D3 |
D2 |
D1 |
D0 |
PCB Temperature |
Zynq Core Temperature |
Interface Board Minimum Temperature
Function: Minimum PCB and Zynq Core temperatures on Interface Board since power-on.
Type: signed byte (8-bits) for PCB and signed byte (8-bits) for Zynq core temperatures
Data Range: 0x0000 0000 to 0x0000 FFFF
Read/Write: R
Initialized Value: Value corresponding to the minimum measured PCB and Zynq core temperatures since power-on based on the table below
Operational Settings: The upper 16-bits are not used, and the lower 16-bits are the minimum PCB and Zynq Core Temperatures. For example, if the register contains the value 0x0000 D8E7, this represents minimum PCB Temperature = -40° Celsius and minimum Zynq Temperature = -25° Celsius.
D31 |
D30 |
D29 |
D28 |
D27 |
D26 |
D25 |
D24 |
D23 |
D22 |
D21 |
D20 |
D19 |
D18 |
D17 |
D16 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
D15 |
D14 |
D13 |
D12 |
D11 |
D10 |
D9 |
D8 |
D7 |
D6 |
D5 |
D4 |
D3 |
D2 |
D1 |
D0 |
PCB Temperature |
Zynq Core Temperature |
Functional Board Maximum Temperature
Function: Maximum PCB temperature on Functional Board since power-on.
Type: signed byte (8-bits) for PCB
Data Range: 0x0000 0000 to 0x0000 00FF
Read/Write: R
Initialized Value: Value corresponding to the measured PCB on the table below
Operational Settings: The upper 24-bits are not used, and the lower 8-bits are the PCB Temperature. For example, if the register contains the value 0x0000 0055, this represents PCB Temperature = 85° Celsius.
D31 |
D30 |
D29 |
D28 |
D27 |
D26 |
D25 |
D24 |
D23 |
D22 |
D21 |
D20 |
D19 |
D18 |
D17 |
D16 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
D15 |
D14 |
D13 |
D12 |
D11 |
D10 |
D9 |
D8 |
D7 |
D6 |
D5 |
D4 |
D3 |
D2 |
D1 |
D0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
PCB Temperature |
Functional Board Minimum Temperature
Function: Minimum PCB temperature on Functional Board since power-on.
Type: signed byte (8-bits) for PCB
Data Range: 0x0000 0000 to 0x0000 00FF
Read/Write: R
Initialized Value: Value corresponding to the measured PCB on the table below
Operational Settings: The upper 24-bits are not used, and the lower 8-bits are the PCB Temperature. For example, if the register contains the value 0x0000 00D8, this represents PCB Temperature = -40° Celsius.
D31 |
D30 |
D29 |
D28 |
D27 |
D26 |
D25 |
D24 |
D23 |
D22 |
D21 |
D20 |
D19 |
D18 |
D17 |
D16 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
D15 |
D14 |
D13 |
D12 |
D11 |
D10 |
D9 |
D8 |
D7 |
D6 |
D5 |
D4 |
D3 |
D2 |
D1 |
D0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
PCB Temperature |
Higher Precision Temperature Readings Registers
These registers provide higher precision readings of the current Zynq and PCB temperatures.
Higher Precision Zynq Core Temperature
Function: Higher precision measured Zynq Core temperature on Interface Board.
Type: signed word (16-bits) for integer part and unsigned word (16-bits) for fractional part
Data Range: 0x0000 0000 to 0xFFFF FFFF
Read/Write: R
Initialized Value: Measured Zynq Core temperature on Interface Board
Operational Settings: The upper 16-bits represent the signed integer part of the temperature and the lower 16-bits represent the fractional part of the temperature with the resolution of 1/1000 of degree Celsius. For example, if the register contains the value 0x002B 0271, this represents Zynq Core Temperature = 43.625° Celsius, and value 0xFFF6 0177 represents -10.375° Celsius.
D31 |
D30 |
D29 |
D28 |
D27 |
D26 |
D25 |
D24 |
D23 |
D22 |
D21 |
D20 |
D19 |
D18 |
D17 |
D16 |
Signed Integer Part of Temperature |
|||||||||||||||
D15 |
D14 |
D13 |
D12 |
D11 |
D10 |
D9 |
D8 |
D7 |
D6 |
D5 |
D4 |
D3 |
D2 |
D1 |
D0 |
Fractional Part of Temperature |
Higher Precision Interface PCB Temperature
Function: Higher precision measured Interface PCB temperature.
Type: signed word (16-bits) for integer part and unsigned word (16-bits) for fractional part
Data Range: 0x0000 0000 to 0xFFFF FFFF
Read/Write: R
Initialized Value: Measured Interface PCB temperature
Operational Settings: The upper 16-bits represent the signed integer part of the temperature and the lower 16-bits represent the fractional part of the temperature with the resolution of 1/1000 of degree Celsius. For example, if the register contains the value 0x0020 007D, this represents Interface PCB Temperature = 32.125° Celsius, and value 0xFFE8 036B represents -24.875° Celsius.
D31 |
D30 |
D29 |
D28 |
D27 |
D26 |
D25 |
D24 |
D23 |
D22 |
D21 |
D20 |
D19 |
D18 |
D17 |
D16 |
Signed Integer Part of Temperature |
|||||||||||||||
D15 |
D14 |
D13 |
D12 |
D11 |
D10 |
D9 |
D8 |
D7 |
D6 |
D5 |
D4 |
D3 |
D2 |
D1 |
D0 |
Fractional Part of Temperature |
Higher Precision Functional PCB Temperature
Function: Higher precision measured Functional PCB temperature.
Type: signed word (16-bits) for integer part and unsigned word (16-bits) for fractional part
Data Range: 0x0000 0000 to 0xFFFF FFFF
Read/Write: R
Initialized Value: Measured Functional PCB temperature
Operational Settings: The upper 16-bits represent the signed integer part of the temperature and the lower 16-bits represent the fractional part of the temperature with the resolution of 1/100 of degree Celsius. For example, if the register contains the value 0x0018 004B, this represents Functional PCB Temperature = 24.75° Celsius, and value 0xFFD9 0019 represents -39.25° Celsius.
D31 |
D30 |
D29 |
D28 |
D27 |
D26 |
D25 |
D24 |
D23 |
D22 |
D21 |
D20 |
D19 |
D18 |
D17 |
D16 |
Signed Integer Part of Temperature |
|||||||||||||||
D15 |
D14 |
D13 |
D12 |
D11 |
D10 |
D9 |
D8 |
D7 |
D6 |
D5 |
D4 |
D3 |
D2 |
D1 |
D0 |
Fractional Part of Temperature |
Module Health Monitoring Registers
The registers in this section provide module temperature measurement information. If the temperature measurements reaches the Lower Critical or Upper Critical conditions, the module will automatically reset itself to prevent damage to the hardware.
Module Sensor Summary Status
Function: The corresponding sensor bit is set if the sensor has crossed any of its thresholds.
Type: unsigned binary word (32-bits)
Data Range: See table below
Read/Write: R
Initialized Value: 0
Operational Settings: This register provides a summary for module sensors. When the corresponding sensor bit is set, the Sensor Threshold Status register for that sensor will indicate the threshold condition that triggered the event.
Bit(s) |
Sensor |
D31:D6 |
Reserved |
D5 |
Functional Board PCB Temperature |
D4 |
Interface Board PCB Temperature |
D3:D0 |
Reserved |
Module Sensor Registers
The registers listed in this section apply to each module sensor listed for the Module Sensor Summary Status register. Each individual sensor register provides a group of registers for monitoring module temperatures readings. From these registers, a user can read the current temperature of the sensor in addition to the minimum and maximum temperature readings since power-up. Upper and lower critical/warning temperature thresholds can be set and monitored from these registers. When a programmed temperature threshold is crossed, the Sensor Threshold Status register will set the corresponding bit for that threshold. The figure below shows the functionality of this group of registers when accessing the Interface Board PCB Temperature sensor as an example.
Sensor Threshold Status
Function: Reflects which threshold has been crossed
Type: unsigned binary word (32-bits)
Data Range: See table below
Read/Write: R
Initialized Value: 0
Operational Settings: The associated bit is set when the sensor reading exceed the corresponding threshold settings.
Bit(s) |
Description |
D31:D4 |
Reserved |
D3 |
Exceeded Upper Critical Threshold |
D2 |
Exceeded Upper Warning Threshold |
D1 |
Exceeded Lower Critical Threshold |
D0 |
Exceeded Lower Warning Threshold |
Sensor Current Reading
Function: Reflects current reading of temperature sensor
Type: Single Precision Floating Point Value (IEEE-754)
Data Range: Single Precision Floating Point Value (IEEE-754)
Read/Write: R
Initialized Value: N/A
Operational Settings: The register represents current sensor reading as a single precision floating point value. For example, for a temperature sensor, register value 0x41C6 0000 represents temperature = 24.75° Celsius.
Sensor Minimum Reading
Function: Reflects minimum value of temperature sensor since power up
Type: Single Precision Floating Point Value (IEEE-754)
Data Range: Single Precision Floating Point Value (IEEE-754)
Read/Write: R
Initialized Value: N/A
Operational Settings: The register represents minimum sensor value as a single precision floating point value. For example, for a temperature sensor, register value 0x41C6 0000 represents temperature = 24.75° Celsius.
Sensor Maximum Reading
Function: Reflects maximum value of temperature sensor since power up
Type: Single Precision Floating Point Value (IEEE-754)
Data Range: Single Precision Floating Point Value (IEEE-754)
Read/Write: R
Initialized Value: N/A
Operational Settings: The register represents maximum sensor value as a single precision floating point value. For example, for a temperature sensor, register value 0x41C6 0000 represents temperature = 24.75° Celsius.
Sensor Lower Warning Threshold
Function: Reflects lower warning threshold of temperature sensor
Type: Single Precision Floating Point Value (IEEE-754)
Data Range: Single Precision Floating Point Value (IEEE-754)
Read/Write: R/W
Initialized Value: Default lower warning threshold (value dependent on specific sensor)
Operational Settings: The register represents sensor lower warning threshold as a single precision floating point value. For example, for a temperature sensor, register value 0xC220 0000 represents temperature = -40.0° Celsius.
Sensor Lower Critical Threshold
Function: Reflects lower critical threshold of temperature sensor
Type: Single Precision Floating Point Value (IEEE-754)
Data Range: Single Precision Floating Point Value (IEEE-754)
Read/Write: R/W
Initialized Value: Default lower critical threshold (value dependent on specific sensor)
Operational Settings: The register represents sensor lower critical threshold as a single precision floating point value. For example, for a temperature sensor, register value 0xC25C 0000 represents temperature = -55.0° Celsius.
Sensor Upper Warning Threshold
Function: Reflects upper warning threshold of temperature sensor
Type: Single Precision Floating Point Value (IEEE-754)
Data Range: Single Precision Floating Point Value (IEEE-754)
Read/Write: R/W
Initialized Value: Default upper warning threshold (value dependent on specific sensor)
Operational Settings: The register represents sensor upper warning threshold as a single precision floating point value. For example, for a temperature sensor, register value 0x42AA 0000 represents temperature = 85.0° Celsius.
Sensor Upper Critical Threshold
Function: Reflects upper critical threshold of temperature sensor
Type: Single Precision Floating Point Value (IEEE-754)
Data Range: Single Precision Floating Point Value (IEEE-754)
Read/Write: R/W
Initialized Value: Default upper critical threshold (value dependent on specific sensor)
Operational Settings: The register represents sensor upper critical threshold as a single precision floating point value. For example, for a temperature sensor, register value 0x42FA 0000 represents temperature = 125.0° Celsius.
FUNCTION REGISTER MAP
Key
Bold Underline |
= Measurement/Status/Board Information |
Bold Italic |
= Configuration/Control |
Module Information Registers
0x003C |
FPGA Revision |
R |
0x0030 |
FPGA Compile Timestamp |
R |
0x0034 |
FPGA SerDes Revision |
R |
0x0038 |
FPGA Template Revision |
R |
0x0040 |
FPGA Zynq Block Revision |
R |
0x0074 |
Bare Metal Revision |
R |
0x0080 |
Bare Metal Compile Time (Bit 0-31) |
R |
0x0084 |
Bare Metal Compile Time (Bit 32-63) |
R |
0x0088 |
Bare Metal Compile Time (Bit 64-95) |
R |
0x008C |
Bare Metal Compile Time (Bit 96-127) |
R |
0x0090 |
Bare Metal Compile Time (Bit 128-159) |
R |
0x0094 |
Bare Metal Compile Time (Bit 160-191) |
R |
0x007C |
FSBL Revision |
R |
0x00B0 |
FSBL Compile Time (Bit 0-31) |
R |
0x00B4 |
FSBL Compile Time (Bit 32-63) |
R |
0x00B8 |
FSBL Compile Time (Bit 64-95) |
R |
0x00BC |
FSBL Compile Time (Bit 96-127) |
R |
0x00C0 |
FSBL Compile Time (Bit 128-159) |
R |
0x00C4 |
FSBL Compile Time (Bit 160-191) |
R |
0x0000 |
Interface Board Serial Number (Bit 0-31) |
R |
0x0004 |
Interface Board Serial Number (Bit 32-63) |
R |
0x0008 |
Interface Board Serial Number (Bit 64-95) |
R |
0x000C |
Interface Board Serial Number (Bit 96-127) |
R |
0x0010 |
Functional Board Serial Number (Bit 0-31) |
R |
0x0014 |
Functional Board Serial Number (Bit 32-63) |
R |
0x0018 |
Functional Board Serial Number (Bit 64-95) |
R |
0x001C |
Functional Board Serial Number (Bit 96-127) |
R |
0x0070 |
Module Capability |
R |
0x01FC |
Module Memory Map Revision |
R |
Module Measurement Registers
0x0200 |
Interface Board PCB/Zynq Current Temperature |
R |
0x0208 |
Functional Board PCB Current Temperature |
R |
0x0218 |
Interface Board PCB/Zynq Max Temperature |
R |
0x0228 |
Interface Board PCB/Zynq Min Temperature |
R |
0x0218 |
Functional Board PCB Max Temperature |
R |
0x0228 |
Functional Board PCB Min Temperature |
R |
0x02C0 |
Higher Precision Zynq Core Temperature |
R |
0x02C4 |
Higher Precision Interface PCB Temperature |
R |
0x02E0 |
Higher Precision Functional PCB Temperature |
R |
Revision History
Module Manual - TC1 Revision History
Revision |
Revision Date |
Description |
C |
2022-10-04 |
ECO C09686, transition to docbuilder format. Replaced "Specifications" with "Data Sheet". Pg.11, changed Voltage op settings from micro-volts to volts. Pg.12, revised function description of RTD or Thermocouple. Pg.32, added Appendix C: Pin-Out Details. |
C1 |
2023-11-27 |
ECO C10984, pg.7, updated Introduction; added TC1 Overview. Pg.10/17/22, added module common registers. Pg.19, removed summary events table. Pg.32, removed 'pendings' from pinouts DATIO29 & 30. |
Module Manual - Status and Interrupts Revision History
Revision |
Revision Date |
Description |
C |
2021-11-30 |
C08896; Transition manual to docbuilder format - no technical info change |
Module Manual - Module Common Registers Revision History
Revision |
Revision Date |
Description |
C |
2023-08-11 |
ECO C10649, initial release of module common registers manual. |
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