Handling High Voltage I/O
Edit this on GitLab
Handling High Voltage I/O
Are there special requirements necessary to handle the high voltage I/O? i.e. High Voltage Synchro Signals (90 VLL / 115 VREF)
There are no special requirements for interfacing high voltage I/O to any of the specifically capable platforms/modules. The systems integrator must be aware that some of the NAI multifunction modules are specially designed to interface with high voltage transducers. For example, 90VLL/115 VREF synchro signals are common in a synchro position feedback system.
All NAI platforms have high voltage signal capability and are fully tested and qualified with many test and embedded systems. The end integrator should confirm that all other system components (e.g. backplanes and wiring) follow inter-pin and trace clearance guidelines. The systems integrator should also be mindful of the operational environment, since factors such as high humidity may influence system behavior. High voltage signal interface concerns may be mitigated by a number of methods including system reconfiguration and conformal coating