8 items under this folder.
Practical guidelines for meeting MIL-STD-461 EMI requirements with an NAI power supply: the tests most relevant to power, the CE102 conducted-emissions setup, and what to do at the power supply and system levels.
How the 56TS1 current-share feature works: master/slave share algorithm, load-balancing limits, Share_OK* BIT output, wiring for two paralleled units, and bench captures of power-up, load-transient, simulated-failure and delayed-start behavior.
How the VITA 62 ENABLE* and INHIBIT* control inputs switch the output rails of NAI VPX power supplies, with the power status table, signal levels, P1 pin locations, and application examples.
Status indications, fault interpretation, and first-line troubleshooting for the Status LED on NAI VPX power supplies.
Why ripple measurements on switching power supplies need high-frequency differential equipment, and a safe alternative using a floated scope and tip-and-barrel probing at the connector.
Alphabetical glossary of power-supply and power-conversion terms used in NAI power supply data sheets and manuals, from AC Fail Signal to WYE input configuration.
What the VITA 62 VBAT output is on NAI VPX power supplies, why it is sourced from +3.3 VDC_Aux rather than a battery, and how to keep it alive with ENABLE*/INHIBIT*.
How remote error sensing works on NAI VPX power supplies, where to terminate the sense lines, and how to wire S+/S- to the point of regulation through the backplane.