Strain Gauge (SG) Family Guide

Overview

The SG family is NAI’s line of strain gauge measurement smart function modules. Where an AD module asks “how much voltage is on this line?”, an SG module asks “how much is this object being stressed?” — it reads the tiny voltage from a strain gauge bridge and converts it into a calibrated strain reading in micro-strain (µε) your software can use directly. Each module has four independent, isolated channels.

This page is the starting point for any SG module. Use it to understand what the family does, wire a strain gauge bridge to a channel, set the bridge and gauge parameters, and confirm the module is measuring. It’s aimed at engineers reading force, weight, pressure, and mechanical stress from the bonded strain gauges and bridge-based transducers used across mil-aero, test, and industrial platforms.

A strain gauge is a sensor whose electrical resistance changes very slightly when it is stretched or compressed. Because that resistance change is so small, gauges are wired into a Wheatstone bridge: a four-arm resistor network driven by an excitation voltage that produces a small differential output voltage proportional to the imbalance the strain creates. The SG module supplies the DC excitation (programmable 2–12 VDC), measures the bridge’s output as a ratio of output to excitation (Vout/Vexc), and then computes strain from that ratio together with the bridge configuration, the gauge’s nominal resistance, gauge factor, Poisson ratio, and lead resistance. Each channel uses an isolated Σ-Δ (sigma-delta) converter with a programmable-gain amplifier and a digital filter with deep notches at 50/60 Hz, so it can resolve a very wide dynamic range cleanly.

In a real system, an SG module is the load-and-stress front-end. Concretely, it reads from: load cells (thrust stands, weigh scales, force feedback), pressure transducers (hydraulic, pneumatic, fuel-system pressure), accelerometers, and structural test instrumentation (airframe, suspension, and fatigue-test articles strain-mapped during qualification). The module also tracks minimum and maximum strain per channel and can flag two independent strain-alert thresholds, so the host can be notified when a reading crosses a warning or alarm limit without polling every sample.

SG modules at a glance

SG1 is the current member of the family. All four channels are independent, isolated, and identically capable — you configure each one to match the bridge wired to it.

Module	Channels	Resolution	Excitation	PGA gain	Sample rate	Manual
SG1	4	24-bit Σ-Δ	2–12 VDC, programmable	×1 – ×32	2.5 SPS – 38.4 kSPS	SG1 Manual

Each channel measures the bridge output as a Vout/Vexc ratio (−1 to +1 V/V) and reports strain in micro-strain (µε), along with running minimum and maximum strain. The on-chip digital filter has deep notches at 50/60 Hz for line-noise rejection, and an automatic background BIT checks every channel continuously.

Choosing a bridge configuration:

Each channel is set up in software, not by the model — the choices are per channel:

Bridge type. SG1 supports seven standard configurations: quarter-bridge (types 1–2), half-bridge (types 1–2), and full-bridge (types 1–3). A quarter bridge has one active gauge, a half bridge has two, and a full bridge has four; the numbered variants differ in how the gauges are placed (axial, transverse/Poisson, bending). See the bridge-configuration diagram in the SG1 Manual for which gauges go where in each type.
Bridge completion. Quarter- and half-bridge sensors don’t supply all four arms of the bridge. SG1 has internal bridge completion you can enable per channel, so you only wire the active gauge(s) and let the module complete the network.
Sense wiring (4-wire vs 6-wire). With 4-wire wiring the module senses excitation internally at its own terminals; with 6-wire wiring it senses excitation remotely at the bridge, which cancels the voltage drop across long lead wires for a more accurate reading. Pick 6-wire when lead resistance matters.
Gain and rate. Set the PGA gain to match your bridge’s signal level and the sample rate to your bandwidth needs — lower sample rates give more stable, more accurate readings.

There is no combination module that bundles strain gauge with another function — SG is always a standalone strain gauge module.

Note

Separately from the standalone SG1, the 68CB6 motherboard offers an inboard 5-channel full-bridge strain gauge configuration built into the board itself. This guide covers the SG1 function module (4 channels); for the 68CB6’s inboard strain gauge, refer to its motherboard manual.

Physical setup

Each SG channel connects to its bridge through three sets of lines: the excitation drive that powers the bridge, optional excitation sense lines, and the bridge signal pair that carries the small output voltage back to the module. In the SG1 Manual pin-out appendix these appear, per channel, as:

Signal	Pins (per channel)	Purpose
Excitation drive	`DRV-H-CHx` / `DRV-L-CHx`	The DC excitation the module drives across the bridge.
Excitation sense	`DRV-H-SNS-CHx` / `DRV-L-SNS-CHx`	Sense the actual excitation — internally (4-wire) or at the bridge (6-wire).
Bridge signal	`BRG-H-CHx` / `BRG-L-CHx`	The bridge’s differential output — the voltage the channel measures.
Bridge completion	`BRG-L-COMP-CHx`	Tie point for the module’s internal half-bridge when completing a quarter/half bridge.

The exact breakout pin numbers depend on your motherboard slot and connector (44-pin vs 50-pin), so always get them from the module’s manual or the motherboard overlay. The pattern is the same for every channel:

Identify the module’s slot number on your NAI motherboard or system.
Bring the channel’s lines out through the breakout board, where the slot’s pins appear as generic IO# numbers.
Map the IO# pins to that channel’s DRV-H/L, DRV-H/L-SNS, BRG-H/L, and (if completing the bridge) BRG-L-COMP signals.
Connect the strain gauge bridge accordingly.

A few things hold for every SG channel:

Excitation is off until you set it. The excitation voltage powers up at 0 V (0x0); set it (2–12 VDC) before expecting a reading. Higher excitation gives a larger signal but more self-heating in the gauge — pick a level your gauge and accuracy budget can tolerate.
Match the bridge configuration to your wiring. Set the channel’s bridge type (quarter/half/full) to match the gauges you actually connect, or the strain math will be wrong.
Complete partial bridges in software-assisted hardware. For quarter- and half-bridge gauges, enable internal bridge completion and wire the BRG-L-COMP pin to BRG-L (see the wiring diagram in the SG1 Manual); the module supplies the missing arms.
Use 6-wire sense for long leads. With 4-wire wiring the module senses excitation at its own terminals; with 6-wire wiring it senses at the bridge, cancelling the IR drop in long lead wires. If you can’t run sense lines, leave it 4-wire and enter the lead resistance so the strain calculation can compensate.

Example — quarter bridge, single active gauge (4-wire, internal completion):

Set the channel to a quarter-bridge configuration and enable internal bridge completion.
Drive the bridge from DRV-H/DRV-L, and wire the active gauge into the BRG-H/BRG-L input with BRG-L-COMP tied to BRG-L per the manual diagram.
Leave sense at 4-wire; enter the gauge’s lead resistance if the leads are long.
Set excitation (e.g. 5 VDC) and the gauge’s nominal resistance, gauge factor, and Poisson ratio, then read strain.

Example — full bridge, four active gauges (6-wire remote sense):

Set the channel to a full-bridge configuration (no internal completion needed — the gauge supplies all four arms).
Drive the bridge excitation corners from DRV-H/DRV-L, and run DRV-H-SNS/DRV-L-SNS to those same corners at the bridge; set the channel to 6-wire sense.
Wire the bridge’s output corners to BRG-H/BRG-L.
Set excitation, nominal resistance, and gauge factor, then read strain.

Software

You drive an SG module through the naibrd_SG_* API in the NAI Software Support Kit (SSK). The same calls work across every OS NAI supports (PetaLinux/ARM Linux, VxWorks, DEOS, Windows) — only the build and deploy steps differ by platform.

There is no open/init/free lifecycle for an SG channel. Every call simply takes (cardIndex, module, channel), so the working pattern is: configure the channel, then read it.

Configure the channel — bridge configuration, internal completion, sense mode, excitation voltage, PGA gain, sample rate, and the gauge parameters (nominal resistance, gauge factor, Poisson ratio, lead resistance) used to turn the raw ratio into strain.
Read the channel — strain (µε), the Vout/Vexc ratio, and the running minimum/maximum strain — and check status/BIT as needed.

Where to find what you need:

Which functions/registers to call — the SG1 Manual documents every naibrd_SG_* register (bridge configuration, excitation, PGA gain, sample rate, gauge parameters, strain alerts, BIT, and the strain/Vout-Vexc/min-max reads).
Building and deploying on your platform — Connecting to Boards covers the toolchain, deployment, and terminal access for PetaLinux/ARM Linux, VxWorks, DEOS, and Windows.
Launching the app on the board itself — Running Applications from the Target walks through loading and launching your executable on the target.

Example — a 68C3 SBC with an SG1 module: pull the naibrd_SG_* calls from the SG1 Manual, set up the toolchain per Connecting to Boards, then load and launch an SG sample on the target per Running Applications from the Target.

Confirm communication

An SG module measures an external bridge, so unlike a synchro or LVDT module it can’t inject a known reading internally — there’s no test-strain mode. Confirm the path in two steps: first prove the module is alive and healthy with BIT (no wiring), then prove it’s actually measuring with a known load.

Built-in test (no wiring). Every SG channel runs a power-on self-test plus continuous background BIT (an A/D loop check and a front-end amplifier check). Confirm the power-on BIT completed and that no BIT fault is latched:

/* SSK 2.x */
bool_t complete;
nai_status_bit_t bitStatus;
naibrd_SG_CheckPowerOnBITComplete(cardIndex, module, &complete);   /* power-on BIT done? */
naibrd_SG_GetChanMappedStatus(cardIndex, module, channel,
   NAIBRD_SG_CHAN_MAPPED_STATUS_BIT_LATCHED, &bitStatus);          /* any BIT fault? (LO = normal) */

/* SSK 1.x */
nai_status_bit_t bitStatus;
/* SSK 1.x has no power-on-BIT-complete helper — read the latched BIT status directly. */
naibrd_SG_GetStatus(cardIndex, module, channel,
   NAI_SG_STATUS_BIT_LATCHED, &bitStatus);                         /* any BIT fault? (LO = normal) */

A successful read with no latched BIT fault proves the link, the SSK, and the module’s analog front-end are all working.

Known-load check (minimal wiring). To prove the channel is actually converting, wire a bridge whose output you can predict — a calibrated load cell at a known load, a precision bridge-simulator, or even a fixed resistor network — then configure the channel and read it back:

/* SSK 2.x */
float64_t voutVexc, strain;
naibrd_SG_SetBridgeConfiguration(cardIndex, module, channel, NAIBRD_SG_BRIDGE_CONFIG_FULL_BRIDGE_1);
naibrd_SG_SetExcitationSignal(cardIndex, module, channel, 5.0);    /* 5 VDC excitation */
naibrd_SG_SetNominalResistance(cardIndex, module, channel, 350.0); /* 350-ohm bridge */
naibrd_SG_SetGaugeFactor(cardIndex, module, channel, 2.0);
naibrd_SG_GetOutputVoutVexc(cardIndex, module, channel, &voutVexc); /* ratio tracks the load */
naibrd_SG_GetStrain(cardIndex, module, channel, &strain);          /* strain in microstrain */

/* SSK 1.x */
float64_t voutVexc, strain;
naibrd_SG_SetBridgeConfiguration(cardIndex, module, channel, NAI_SG_BRIDGE_CONFIG_FULL_BRIDGE_1);
naibrd_SG_SetExcitationSignal(cardIndex, module, channel, 5.0);    /* 5 VDC excitation */
naibrd_SG_SetNominalResistance(cardIndex, module, channel, 350.0); /* 350-ohm bridge */
naibrd_SG_SetGaugeFactor(cardIndex, module, channel, 2.0);
naibrd_SG_GetOutputVoutVexc(cardIndex, module, channel, &voutVexc); /* ratio tracks the load */
naibrd_SG_GetStrain(cardIndex, module, channel, &strain);          /* strain in microstrain */

With the bridge balanced (no load) the ratio sits near zero; apply or remove load and voutVexc and strain move with it. The SG BasicOps sample walks through this whole configure-and-read flow interactively, and the SG Summary sample focuses on reading and clearing status across all channels.

Features

Everything an SG channel does falls into four areas: reading the strain and ratio it computes, configuring the bridge and gauge so that computation is correct, tuning the A/D for your signal level and bandwidth, and watching alerts and health. Each block below lists the naibrd_SG_* calls for that area, with SSK 1.x and 2.x signatures side by side (the function names are the same across versions — the differences are the NAI_/NAIBRD_ enum prefixes, the *out/*p_out parameter names, and the GetStatus→GetChanMappedStatus rename).

Read strain and ratiometric output

What it does: Returns the channel’s computed strain (µε) and the underlying Vout/Vexc ratio (V/V), plus the running minimum and maximum strain the channel has seen, and the raw A/D reading. The min/max latches can be reset on demand.

Relevant APIs:

/* SSK 1.x */
nai_status_t naibrd_SG_GetStrain(int32_t cardIndex, int32_t module, int32_t channel, float64_t* outstrain);
nai_status_t naibrd_SG_GetOutputVoutVexc(int32_t cardIndex, int32_t module, int32_t channel, float64_t* outoutputvv);
nai_status_t naibrd_SG_GetMinStrainValue(int32_t cardIndex, int32_t module, int32_t channel, float64_t* outminStrainValue);
nai_status_t naibrd_SG_GetMaxStrainValue(int32_t cardIndex, int32_t module, int32_t channel, float64_t* outmaxStrainValue);
nai_status_t naibrd_SG_GetRawADReading(int32_t cardIndex, int32_t module, int32_t channel, uint32_t* outrawADReading);
nai_status_t naibrd_SG_ResetMinimumAndMaximumStrain(int32_t cardIndex, int32_t module, int32_t channel);

/* SSK 2.x */
nai_status_t naibrd_SG_GetStrain(int32_t cardIndex, int32_t module, int32_t channel, float64_t* p_outstrain);
nai_status_t naibrd_SG_GetOutputVoutVexc(int32_t cardIndex, int32_t module, int32_t channel, float64_t* p_outoutputvv);
nai_status_t naibrd_SG_GetMinStrainValue(int32_t cardIndex, int32_t module, int32_t channel, float64_t* p_outminStrainValue);
nai_status_t naibrd_SG_GetMaxStrainValue(int32_t cardIndex, int32_t module, int32_t channel, float64_t* p_outmaxStrainValue);
nai_status_t naibrd_SG_GetRawADReading(int32_t cardIndex, int32_t module, int32_t channel, uint32_t* p_outrawADReading);
nai_status_t naibrd_SG_ResetMinimumAndMaximumStrain(int32_t cardIndex, int32_t module, int32_t channel);

Exercise it: SG BasicOps (SSK 2.x) · SG BasicOps (SSK 1.x).

Configure the bridge and gauge

What it does: Tells the channel what it’s wired to so the strain calculation is correct. Set the bridge configuration (quarter/half/full type), whether to use internal bridge completion, the sense mode (4-wire local / 6-wire remote), and the excitation voltage. The gauge parameters — nominal resistance, gauge factor, Poisson ratio, and lead resistance — feed the µε computation.

Relevant APIs:

/* SSK 1.x */
nai_status_t naibrd_SG_SetBridgeConfiguration(int32_t cardIndex, int32_t module, int32_t channel, nai_sg_bridge_config_type_t bridgeConfig);
nai_status_t naibrd_SG_SetUseInternalBridgeCompletion(int32_t cardIndex, int32_t module, int32_t channel, bool_t useInternalBridgeCompletion);
nai_status_t naibrd_SG_SetRemoteDriveSense(int32_t cardIndex, int32_t module, int32_t channel, nai_sg_remote_sense_t sense);
nai_status_t naibrd_SG_SetExcitationSignal(int32_t cardIndex, int32_t module, int32_t channel, float64_t excitationVolt);
nai_status_t naibrd_SG_SetNominalResistance(int32_t cardIndex, int32_t module, int32_t channel, float64_t nominalResistance);
nai_status_t naibrd_SG_SetGaugeFactor(int32_t cardIndex, int32_t module, int32_t channel, float64_t gaugeFactor);
nai_status_t naibrd_SG_SetPoissonRatio(int32_t cardIndex, int32_t module, int32_t channel, float64_t poissonRatio);
nai_status_t naibrd_SG_SetLeadResistance(int32_t cardIndex, int32_t module, int32_t channel, float64_t leadResistance);

/* SSK 2.x */
nai_status_t naibrd_SG_SetBridgeConfiguration(int32_t cardIndex, int32_t module, int32_t channel, naibrd_sg_bridge_config_type_t bridgeConfig);
nai_status_t naibrd_SG_SetUseInternalBridgeCompletion(int32_t cardIndex, int32_t module, int32_t channel, bool_t useInternalBridgeCompletion);
nai_status_t naibrd_SG_SetRemoteDriveSense(int32_t cardIndex, int32_t module, int32_t channel, naibrd_sg_remote_sense_t sense);
nai_status_t naibrd_SG_SetExcitationSignal(int32_t cardIndex, int32_t module, int32_t channel, float64_t excitationVolt);
nai_status_t naibrd_SG_SetNominalResistance(int32_t cardIndex, int32_t module, int32_t channel, float64_t nominalResistance);
nai_status_t naibrd_SG_SetGaugeFactor(int32_t cardIndex, int32_t module, int32_t channel, float64_t gaugeFactor);
nai_status_t naibrd_SG_SetPoissonRatio(int32_t cardIndex, int32_t module, int32_t channel, float64_t poissonRatio);
nai_status_t naibrd_SG_SetLeadResistance(int32_t cardIndex, int32_t module, int32_t channel, float64_t leadResistance);

Each setter has a matching naibrd_SG_Get… to read the value back (e.g. naibrd_SG_GetBridgeConfiguration, naibrd_SG_GetExcitationSignal). The bridge type uses NAIBRD_SG_BRIDGE_CONFIG_QUARTER_BRIDGE_1 … …_FULL_BRIDGE_3 (1.x: NAI_SG_…); the sense mode uses NAIBRD_SG_GEN5_LOCAL_SENSE (4-wire) / NAIBRD_SG_GEN5_REMOTE_SENSE (6-wire).

Exercise it: SG BasicOps (SSK 2.x) · SG BasicOps (SSK 1.x).

Tune the A/D

What it does: Matches the converter to your signal. PGA gain (×1–×32) scales small bridge outputs into the A/D’s range; sample rate (2.5 SPS–38.4 kSPS) trades speed for stability — lower rates give quieter, more accurate readings. Imbalance offset subtracts a fixed bridge offset (the reading at no load) so the channel reads true zero.

Relevant APIs:

/* SSK 1.x */
nai_status_t naibrd_SG_SetPGAGain(int32_t cardIndex, int32_t module, int32_t channel, nai_sg_pga_gain_type_t pgaGain);
nai_status_t naibrd_SG_SetSampleRate(int32_t cardIndex, int32_t module, int32_t channel, nai_sg_sample_rate_type_t sampleRate);
nai_status_t naibrd_SG_SetImbalanceOffsetValue(int32_t cardIndex, int32_t module, int32_t channel, float64_t imbalanceOffsetValue);

/* SSK 2.x */
nai_status_t naibrd_SG_SetPGAGain(int32_t cardIndex, int32_t module, int32_t channel, naibrd_sg_pga_gain_type_t pgaGain);
nai_status_t naibrd_SG_SetSampleRate(int32_t cardIndex, int32_t module, int32_t channel, naibrd_sg_sample_rate_type_t sampleRate);
nai_status_t naibrd_SG_SetImbalanceOffsetValue(int32_t cardIndex, int32_t module, int32_t channel, float64_t imbalanceOffsetValue);

Gain uses NAIBRD_SG_PGA_GAIN_1 … …_32 (1.x: NAI_SG_PGA_GAIN_*); sample rate uses NAIBRD_SG_SAMPLE_RATE_2P5_SPS … …_38400_SPS (1.x: NAI_SG_SAMPLE_RATE_*).

Exercise it: SG BasicOps (SSK 2.x) · SG BasicOps (SSK 1.x).

Strain alerts and health/BIT/status

What it does: Each channel can flag two independent strain-alert tiers, each with a low and a high threshold (µε) — use Alert 1 as a warning band and Alert 2 as an outer alarm band, or vice versa. The status word also reports BIT, an open-bridge detection, A/D errors, and a summary. Statuses come in latched and realtime forms, can each raise an interrupt, and SetChanStatusEnable (2.x) turns per-channel status reporting on.

Relevant APIs:

/* SSK 1.x */
nai_status_t naibrd_SG_SetStrainAlertValue(int32_t cardIndex, int32_t module, int32_t channel, nai_sg_strain_alert_value_type_t strainAlertValueType, float64_t strainAlertValue);
nai_status_t naibrd_SG_GetStatus(int32_t cardIndex, int32_t module, int32_t channel, nai_sg_status_type_t type, nai_status_bit_t* outstatusBit);
nai_status_t naibrd_SG_ClearStatus(int32_t cardIndex, int32_t module, int32_t channel, nai_sg_status_type_t type);
nai_status_t naibrd_SG_SetInterruptEnable(int32_t cardIndex, int32_t module, int32_t channel, nai_sg_status_type_t type, bool_t enable);
nai_status_t naibrd_SG_SetInterruptEdgeLevel(int32_t cardIndex, int32_t module, int32_t channel, nai_sg_status_type_t type, nai_sg_edgelevel_t edgelevel);

/* SSK 2.x */
nai_status_t naibrd_SG_SetStrainAlertValue(int32_t cardIndex, int32_t module, int32_t channel, naibrd_sg_strain_alert_value_type_t strainAlertValueType, float64_t strainAlertValue);
nai_status_t naibrd_SG_SetChanStatusEnable(int32_t cardIndex, int32_t module, int32_t channel, bool_t enable);
nai_status_t naibrd_SG_GetChanMappedStatus(int32_t cardIndex, int32_t module, int32_t channel, naibrd_sg_chan_mapped_status_type_t type, nai_status_bit_t* p_outstatusBit);
nai_status_t naibrd_SG_ClearChanMappedStatus(int32_t cardIndex, int32_t module, int32_t channel, naibrd_sg_chan_mapped_status_type_t type);
nai_status_t naibrd_SG_SetChanMappedInterruptEnable(int32_t cardIndex, int32_t module, int32_t channel, naibrd_sg_chan_mapped_status_type_t type, bool_t enable);
nai_status_t naibrd_SG_SetChanMappedInterruptTriggerType(int32_t cardIndex, int32_t module, int32_t channel, naibrd_sg_chan_mapped_status_type_t type, naibrd_int_trigger_type_t triggerType);

The four strain-alert thresholds are NAIBRD_SG_HIGH_STRAIN_ALERT_1_VALUE, …_HIGH_STRAIN_ALERT_2_VALUE, …_LOW_STRAIN_ALERT_1_VALUE, and …_LOW_STRAIN_ALERT_2_VALUE (1.x: NAI_SG_…). Interrupt vector and steering also have setters (…InterruptVector / …InterruptSteering) if you route interrupts to a specific handler.

Exercise it: SG BasicOps (SSK 2.x) · SG BasicOps (SSK 1.x) · SG Summary.

Try it

Three short sequences that build on each other. They use card 0, module 1, channel 1; substitute your own slot and channel.

1. Configure a quarter bridge and read strain. Set the bridge type, complete it internally, pick gain and rate, and turn on excitation — then read:

/* SSK 1.x */
int32_t cardIndex = 0, module = 1, channel = 1;
float64_t strain;
 
naibrd_SG_SetBridgeConfiguration(cardIndex, module, channel, NAI_SG_BRIDGE_CONFIG_QUARTER_BRIDGE_1);
naibrd_SG_SetUseInternalBridgeCompletion(cardIndex, module, channel, NAI_TRUE);  /* complete the quarter bridge */
naibrd_SG_SetRemoteDriveSense(cardIndex, module, channel, SG_GEN5_LOCAL_SENSE);  /* 4-wire */
naibrd_SG_SetPGAGain(cardIndex, module, channel, NAI_SG_PGA_GAIN_4);
naibrd_SG_SetSampleRate(cardIndex, module, channel, NAI_SG_SAMPLE_RATE_60_SPS);
naibrd_SG_SetExcitationSignal(cardIndex, module, channel, 5.0);                  /* 5 VDC */
 
naibrd_SG_GetStrain(cardIndex, module, channel, &strain);

/* SSK 2.x */
int32_t cardIndex = 0, module = 1, channel = 1;
float64_t strain;
 
naibrd_SG_SetBridgeConfiguration(cardIndex, module, channel, NAIBRD_SG_BRIDGE_CONFIG_QUARTER_BRIDGE_1);
naibrd_SG_SetUseInternalBridgeCompletion(cardIndex, module, channel, NAI_TRUE);  /* complete the quarter bridge */
naibrd_SG_SetRemoteDriveSense(cardIndex, module, channel, NAIBRD_SG_GEN5_LOCAL_SENSE);  /* 4-wire */
naibrd_SG_SetPGAGain(cardIndex, module, channel, NAIBRD_SG_PGA_GAIN_4);
naibrd_SG_SetSampleRate(cardIndex, module, channel, NAIBRD_SG_SAMPLE_RATE_60_SPS);
naibrd_SG_SetExcitationSignal(cardIndex, module, channel, 5.0);                  /* 5 VDC */
 
naibrd_SG_GetStrain(cardIndex, module, channel, &strain);

2. Enter the gauge parameters and read the ratio and strain. The strain value is only as correct as these inputs — set them to match your gauge, then read both the raw ratio and the computed strain:

/* SSK 1.x */
float64_t voutVexc, strain;
 
naibrd_SG_SetNominalResistance(cardIndex, module, channel, 350.0);  /* 350-ohm gauge */
naibrd_SG_SetGaugeFactor(cardIndex, module, channel, 2.0);
naibrd_SG_SetPoissonRatio(cardIndex, module, channel, 0.3);
naibrd_SG_SetLeadResistance(cardIndex, module, channel, 0.5);       /* compensate lead wires */
 
naibrd_SG_GetOutputVoutVexc(cardIndex, module, channel, &voutVexc); /* raw bridge ratio (V/V) */
naibrd_SG_GetStrain(cardIndex, module, channel, &strain);           /* computed strain (µε) */

/* SSK 2.x */
float64_t voutVexc, strain;
 
naibrd_SG_SetNominalResistance(cardIndex, module, channel, 350.0);  /* 350-ohm gauge */
naibrd_SG_SetGaugeFactor(cardIndex, module, channel, 2.0);
naibrd_SG_SetPoissonRatio(cardIndex, module, channel, 0.3);
naibrd_SG_SetLeadResistance(cardIndex, module, channel, 0.5);       /* compensate lead wires */
 
naibrd_SG_GetOutputVoutVexc(cardIndex, module, channel, &voutVexc); /* raw bridge ratio (V/V) */
naibrd_SG_GetStrain(cardIndex, module, channel, &strain);           /* computed strain (µε) */

3. Set strain-alert thresholds and check the alert status. Arm a warning band (Alert 1), then poll the latched high-alert status and clear it once handled. (SSK 2.x has SetChanStatusEnable to turn per-channel status reporting on; SSK 1.x reports status without it.)

/* SSK 1.x */
nai_status_bit_t alertHi;
 
naibrd_SG_SetStrainAlertValue(cardIndex, module, channel, NAI_SG_HIGH_STRAIN_ALERT_1_VALUE, 800.0);   /* warn at +800 µε */
naibrd_SG_SetStrainAlertValue(cardIndex, module, channel, NAI_SG_LOW_STRAIN_ALERT_1_VALUE, -800.0);
 
naibrd_SG_GetStatus(cardIndex, module, channel,
   NAI_SG_STATUS_HIGH_STRAIN_ALERT_1_LATCHED, &alertHi);            /* tripped? */
if (alertHi)
   naibrd_SG_ClearStatus(cardIndex, module, channel,
      NAI_SG_STATUS_HIGH_STRAIN_ALERT_1_LATCHED);                   /* clear the latch */

/* SSK 2.x */
nai_status_bit_t alertHi;
 
naibrd_SG_SetChanStatusEnable(cardIndex, module, channel, NAI_TRUE);  /* enable per-channel status reporting */
naibrd_SG_SetStrainAlertValue(cardIndex, module, channel, NAIBRD_SG_HIGH_STRAIN_ALERT_1_VALUE, 800.0);  /* warn at +800 µε */
naibrd_SG_SetStrainAlertValue(cardIndex, module, channel, NAIBRD_SG_LOW_STRAIN_ALERT_1_VALUE, -800.0);
 
naibrd_SG_GetChanMappedStatus(cardIndex, module, channel,
   NAIBRD_SG_CHAN_MAPPED_STATUS_HIGH_STRAIN_ALERT_1_LATCHED, &alertHi);  /* tripped? */
if (alertHi)
   naibrd_SG_ClearChanMappedStatus(cardIndex, module, channel,
      NAIBRD_SG_CHAN_MAPPED_STATUS_HIGH_STRAIN_ALERT_1_LATCHED);         /* clear the latch */

Run them: SG BasicOps (SSK 2.x) · SG BasicOps (SSK 1.x). For the full set of sample apps — and how to build and run them — see the sample-application guides: Using NAI SSK 2.x Sample Applications · Using NAI SSK 1.x Sample Applications.

Hardware capabilities and status monitoring

Beyond the strain reading itself, each SG channel provides hardware that runs continuously and reports health you can monitor:

Automatic background BIT — every channel is checked at periodic intervals for correct A/D operation, transparently and without disturbing measurements. BIT has two parts: a loop test (A/D interface and operation) and an amp test (the front-end circuitry); their logical OR is the overall BIT status.
Open-bridge and A/D fault detection — the channel flags a disconnected/open bridge, an A/D error, and a missing A/D reference.
Programmable DC excitation — 2–12 VDC per channel from the module’s own supply, with 4-wire or 6-wire sensing.
On-chip digital filtering — a fourth-order filter with deep notches at 50/60 Hz, plus per-channel programmable sample rate.
Min/max strain capture — each channel latches the lowest and highest strain seen until you reset it.
Factory calibration — internal calibration values stored in flash, applied transparently so reads are post-calibration.

Statuses you can monitor (each available as dynamic/realtime and latched, each able to raise an interrupt):

Status	Meaning
BIT	A built-in test (loop or amp) failed on the channel.
Open	The bridge input is open/disconnected.
A/D error	The channel’s A/D reported an error.
A/D no reference	The A/D is missing its reference.
High/Low Strain Alert 1	Strain crossed the Alert 1 high/low threshold.
High/Low Strain Alert 2	Strain crossed the Alert 2 high/low threshold.
Summary	Logical OR of the channel’s faults — poll this to check a channel at a glance.

Read these per channel with naibrd_SG_GetChanMappedStatus (2.x) / naibrd_SG_GetStatus (1.x), or poll the summary status to check the whole channel at once. The SG Summary sample is built around reading and clearing these across all channels, and ESP2’s status panel shows the same statuses interactively if you’d rather watch them in a GUI first.

Common pitfalls

Excitation is off by default. The excitation voltage powers up at 0 V — set it (2–12 VDC) or the bridge produces nothing and strain reads zero.
The bridge must be complete. A quarter- or half-bridge gauge only supplies part of the network; enable internal bridge completion (and wire BRG-L-COMP to BRG-L) or the reading is meaningless. Match the bridge configuration to what you actually wired.
Gauge parameters drive the math. Strain is computed from nominal resistance, gauge factor, Poisson ratio, and lead resistance — leave them at defaults that don’t match your gauge and the µε value will be wrong even though the raw Vout/Vexc ratio is fine.
Use 6-wire sense (or enter lead resistance) for long leads. Lead-wire resistance adds error; sense remotely at the bridge with 6-wire wiring, or enter the lead resistance so the calculation compensates.
Lower sample rates read better. Higher sample rates are faster but noisier; the lowest rate that meets your bandwidth gives the most stable, accurate readings.
Alert 1 vs Alert 2 are two independent tiers. Each has its own low and high threshold and its own status/interrupt — decide which you’re using as a warning band and which as an alarm band.
Latched statuses stay set until cleared. A latched BIT or strain-alert bit remains set after the condition clears; clear it (ClearChanMappedStatus / ClearStatus) once handled so you can see the next event.

SG1 Manual — full register descriptions, bridge-configuration and completion diagrams, electrical specs, and pin-out appendix.
SG BasicOps (SSK 2.x) · SG BasicOps (SSK 1.x) — configure a channel and read strain interactively.
SG Summary — read and clear BIT/summary status across all channels.
Download the SSK — get the SSK and the naibrd_SG_* headers and samples.
Connecting to Boards — toolchain, deployment, and terminal access per platform.
Running Applications from the Target — load and launch your application on the board.
ESP2 Quick Start — exercise SG channels with no code via the Embedded Soft Panel.

NAI Documentation

Explorer

SG Module Guide

Strain Gauge (SG) Family Guide

Overview

SG modules at a glance

Physical setup

Software

Confirm communication

Features

Read strain and ratiometric output

Configure the bridge and gauge

Tune the A/D

Strain alerts and health/BIT/status

Try it

Hardware capabilities and status monitoring

Common pitfalls

Table of Contents

NAI Documentation

Explorer

SG Module Guide

Strain Gauge (SG) Family Guide

Overview

SG modules at a glance

Physical setup

Software

Confirm communication

Features

Read strain and ratiometric output

Configure the bridge and gauge

Tune the A/D

Strain alerts and health/BIT/status

Try it

Hardware capabilities and status monitoring

Common pitfalls

Related resources

Table of Contents