/* Common Sample Program include files */
#include "include/naiapp_interrupt.h"
#include "include/naiapp_interrupt_ether.h"
#include "include/naiapp_boardaccess_menu.h"
#include "include/naiapp_boardaccess_query.h"
#include "include/naiapp_boardaccess_access.h"
#include "include/naiapp_boardaccess_display.h"
#include "include/naiapp_boardaccess_utils.h"

/* Common DS Sample Program include files */
#include "nai_ds_int_ether.h"
#include "nai_ds_cfg.h"

/* naibrd include files */
#include "functions/naibrd_ds.h"
#include "maps/nai_map_ds.h"
#include "advanced/nai_ether_adv.h"

/**************************************************************************************************************/
/**
<summary>
Constructs the ethernet commands that are part of the IDR. Configures the IDR on the board.
</summary>
*/
/**************************************************************************************************************/
void setupIDRConfiguration_DS(DsConfig inputDSConfig,IDRConfig* inputIDRConfig,bool_t bGen4DSIDRCommands){

   int32_t cardIndex = inputIDRConfig->cardIndex;
   uint16_t protocol = inputIDRConfig->protocol;
   uint16_t port = inputIDRConfig->port;
   uint8_t* ipAddress = inputIDRConfig->ipAddress;
   uint8_t ipLength = inputIDRConfig->ipLength;

   int32_t vector1 = NAI_DS_BITLOSS_INTERRUPT_VECTOR;
   int32_t vector2 = NAI_DS_REFLOSS_INTERRUPT_VECTOR;

   uint8_t *commands   = inputIDRConfig->commands;				/*Stores the ethernet commands that are going to be executed as part of the IDR*/
   uint16_t *cmdcount  =  &inputIDRConfig->cmdcount;
   uint16_t *cmdlength =  &inputIDRConfig->cmdlength;

   uint32_t addr = NAI_DS_GEN5_REG_BIT_LATCHED_STATUS_ADD; /*Reads from this base address and then NAI_DS_GEN5_REG_REF_LOSS_LATCHED_STATUS_ADD*/

   InitDSIDRCommands(inputDSConfig,inputIDRConfig,bGen4DSIDRCommands,addr);
   check_status(naibrd_Ether_ClearIDRConfig(cardIndex,(uint16_t)DEF_ETHERNET_DS_BITLOSS_IDR_ID));/* clear IDR config	*/
   check_status(naibrd_Ether_SetIDRConfig(cardIndex,(uint16_t)DEF_ETHERNET_DS_BITLOSS_IDR_ID,protocol,ipLength,ipAddress,port,vector1,*cmdcount,*cmdlength,commands));
   check_status(naibrd_Ether_ClearIDRConfig(cardIndex,(uint16_t)DEF_ETHERNET_DS_REFLOSS_IDR_ID));/* clear IDR config	*/
   check_status(naibrd_Ether_SetIDRConfig(cardIndex,(uint16_t)DEF_ETHERNET_DS_REFLOSS_IDR_ID,protocol,ipLength,ipAddress,port,vector2,*cmdcount,*cmdlength,commands));

}
/**************************************************************************************************************/
/**
<summary>
This function configures the IDR (Interrupt Driven Response) commands when a DS BIT/REF LOSS interrupt occurs.
There are four Ethernet commands that will be processed by the board when a DS BIT/REF LOSS interrupt occurs.

</summary>
*/
/**************************************************************************************************************/
void InitDSIDRCommands(DsConfig inputDSConfig,IDRConfig* inputIDRConfig,bool_t bGen4DSIDRCommands,uint32_t addr)
{
   nai_status_t status = NAI_SUCCESS;

   uint16_t msgIndex = 0;
   uint32_t boardAddress;
   uint32_t moduleOffset;

   boardAddress = 0;

   status = check_status(naibrd_GetModuleOffset(inputDSConfig.cardIndex, inputDSConfig.module, &moduleOffset));
   if(status == NAI_SUCCESS)
      status = check_status(naibrd_GetAddress(inputDSConfig.cardIndex,&boardAddress));

   if (status == NAI_SUCCESS)
   {
      if (bGen4DSIDRCommands)
      {
         msgIndex = inputIDRConfig->cmdlength;
         MakeDSReadRegsCommand(inputIDRConfig,boardAddress,moduleOffset,bGen4DSIDRCommands,msgIndex, addr);
      }
   }
}
/**************************************************************************************************************/
/**
<summary>
This function constructs an ethernet read reg command and stores it in the IDR Configuration. The read will be performed
on the modules latched status interrupt register. This function will read two registers based on the stride being set to
16 and addr being set to the first register that needs to be read
</summary>
*/
/**************************************************************************************************************/
void MakeDSReadRegsCommand(IDRConfig* inputIDRConfig,uint32_t boardAddress,int32_t moduleOffset,bool_t bGen4Ether, uint16_t startIndex,uint32_t addr)
{

   uint16_t msgIndex = startIndex;
   uint16_t seqno;
   uint32_t count, stride;

   if (bGen4Ether)
   {
      /*By setting the stride to 16 and base addr to BIT loss latched status,*/
      /*two registers will be read using the command array, the BIT loss and REF loss latched status registers*/
      seqno = 0;
      addr = boardAddress + moduleOffset + addr;
      count = DS_INTERRUPT_RESPONSE_REG_COUNT;
      stride = 32;

     msgIndex = (uint16_t)nai_ether_MakeReadMessage(&inputIDRConfig->commands[startIndex],seqno,NAI_ETHER_GEN4,(nai_intf_t)inputIDRConfig->boardInterface,addr,stride,count,NAI_REG32);
     inputIDRConfig->cmdlength = inputIDRConfig->cmdlength + msgIndex;
     command_index_interrupt_status = inputIDRConfig->cmdcount;
     inputIDRConfig->cmdcount++;
   }
}
/**************************************************************************************************************/
/**
<summary>
HandleDSEtherInterrupt is called by the decodeUPRIDRMessages() routine in nai_sys_int_ether.c when an
unprompted (UPR) Ethernet message is received with the TDR/IDR Index equal to DEF_ETHERNET_DT_IDR_ID.
This routine will parse the message to retrieve the information requested in the SetupDTEtherIDRconfig()
routine.
</summary>
*/
/**************************************************************************************************************/
void HandleDSEtherInterrupt(uint16_t msglen, uint8_t msg[],uint16_t tdr_idr_id)
{
   uint16_t seq;
   nai_ether_typecode_t tc;
   nai_ether_gen_t gen = NAI_ETHER_GEN4;
   int32_t size;
   int32_t offset;
   uint16_t datacnt = 0;
   uint32_t data;
   uint32_t dsstatus_int[DS_INTERRUPT_RESPONSE_REG_COUNT];
   nai_ds_status_type_t ds_status_type = NAI_DS_STATUS_LATCH_BIT_LOST;
   int32_t i;
   offset = nai_ether_DecodeMessageHeader(msg, msglen, &seq, &tc, gen, &size);

   switch (tc)
   {
   case NAI_ETHER_TYPECODE_RSP_COMMAND_COMPLETE_READ_4:
      datacnt = (msglen - 10)/NAI_REG32;
      for (i = 0; i < datacnt; i++)
      {
         data = 0;
         data =   msg[offset++] << 24;
         data |=  msg[offset++] << 16;
         data |=  msg[offset++] << 8;
         data |=  msg[offset++];
         if (i < DS_INTERRUPT_RESPONSE_REG_COUNT)
            dsstatus_int[i] = data;
      }
      break;
   }
    printf("\n\n");
    printf("IDR ID : %d\n", tdr_idr_id);

   /* Check to make sure we got all 4 status elements (BIT LOSS, REF LOSS) */
   if (datacnt == DS_INTERRUPT_RESPONSE_REG_COUNT)
   {

      for (i = 0; i < DS_INTERRUPT_RESPONSE_REG_COUNT; i++)
      {
         switch (i)
         {
         case 0:
            ds_status_type = NAI_DS_STATUS_LATCH_BIT_LOST;
            break;
         case 1:
            ds_status_type = NAI_DS_STATUS_LATCH_REFERENCE_LOST;
            break;
         }
         if (dsstatus_int[i] != 0)
         {
            switch (i)
            {
            case 0:
               printf("Received DS BIT LOSS Interrupt: (Interrupt_status) 0x%08X\n", dsstatus_int[i]);
            break;
            case 1:
               printf("Received DS REFERENCE LOSS Interrupt: (Interrupt_status) 0x%08X\n", dsstatus_int[i]);
            break;
            }

            check_status(naibrd_DS_ClearStatusRaw(inputDSConfig.cardIndex, inputDSConfig.module, ds_status_type, dsstatus_int[i]));
            switch (i)
            {
            case 0:
               printf("Cleared DS BIT LOSS Interrupt: 0x%08X\n", dsstatus_int[i]);
            break;
            case 1:
               printf("Cleared DS REFERENCE LOSS Interrupt: 0x%08X\n", dsstatus_int[i]);
            break;
            }
         }
      }
   }
}

/**************************************************************************************************************/
/**
<summary>
This function constructs an ethernet write reg command and stores it in the IDR Configuration. The write will be performed
on the modules latched status interrupt register. The purpose of this write is to clear the interrupt status register and re-arm the interrupts
after one has occurred.
</summary>
*/
/**************************************************************************************************************/
void MakeDSWriteRegsCommand(DsConfig inputDSConfig, IDRConfig* inputIDRConfig,uint32_t boardAddress,int32_t moduleOffset,bool_t bGen4Ether, uint16_t startIndex)
{

   uint16_t msgIndex = startIndex;
   uint16_t seqno;
   uint32_t count, stride;
   uint32_t regaddr;
   uint32_t data = 0x1 << (inputDSConfig.channel-1);   /* Clear Rx interrupt bits */
   uint32_t addr=NAI_DS_GEN5_REG_BIT_LATCHED_STATUS_ADD;

   if (bGen4Ether)
   {

      seqno = 0;
      regaddr = boardAddress + moduleOffset + addr;
      count = 1;
      stride = 4;

      msgIndex = (uint16_t)nai_ether_BeginWriteMessage(&inputIDRConfig->commands[startIndex],seqno,NAI_ETHER_GEN4,(nai_intf_t)inputIDRConfig->boardInterface,regaddr,stride,count,NAI_REG32);
      if (msgIndex >= 0)
      {
         msgIndex = (uint16_t)nai_ether_WriteMessageData(&inputIDRConfig->commands[startIndex],msgIndex,NAI_REG32,&data,NAI_REG32,count);

         if (msgIndex >= 0)
         {
         msgIndex = (uint16_t)nai_ether_FinishMessage(&inputIDRConfig->commands[startIndex],msgIndex,NAI_ETHER_GEN4);
         }
      }
      inputIDRConfig->cmdlength = inputIDRConfig->cmdlength + msgIndex;
      inputIDRConfig->cmdcount++;
   }
}