SUM1553 Remote Terminal Processor-Control Sample Application (SSK 1.x)
Overview
The SUM1553 RT Processor-Control sample application configures an NAI Summit-based MIL-STD-1553 channel as a Remote Terminal (RT) that runs under the module’s onboard 1553 processor, and delivers received-message events to the host over Ethernet. It is the most capable of the Summit RT samples: instead of the host polling each subaddress for new data (as SUM1553 RT PingPong does), the 1553 processor watches the bus autonomously, pushes each received message onto an Event FIFO, and raises an interrupt. That interrupt is routed out as an unprompted Ethernet reply (an IDR) carrying the event, which the host receives and decodes.
Two FIFOs mediate between the host and the processor:
- Event FIFO — the processor places received-message events here; they are delivered to the host as Ethernet IDRs.
- Request FIFO — the host places update requests here (e.g. new transmit data), and the processor applies them. While processor control is active, the host does not touch core memory directly; it goes through this FIFO.
The RT identity setup (address, buses, ping-pong, subaddress legalization) is the same as in the SUM1553 RT PingPong sample — this guide focuses on the processor-control and Ethernet-event machinery layered on top. Once running, the menu lets you press U to update transmit data (via the Request FIFO), enter a duration in seconds to listen for received-message events, or Q to quit. Pair it with the SUM1553 BC Scheduler sample supplying the BC side.
Important
This sample requires the board to be reachable over Ethernet — it opens a socket for the IDRs and routes 1553-processor interrupts out over Ethernet. It reads the board’s IP/port from the loaded system configuration.
Prerequisites
Before running this sample, make sure you have:
- An NAI board with a Summit-capable FT 1553 module (FTA–FTF, FTJ–FTK), connected over Ethernet.
- A Bus Controller on the same bus addressing this RT (e.g. the companion SUM1553 BC Scheduler sample).
- SSK 1.x installed on your development host, with the sample applications built.
How to Run
Launch the SUM1553_RT_ProcCtrl executable from your build output directory. On startup the application looks for a configuration file (default_SUM1553_RTProc.txt). On the first run this file will not exist — the application presents an interactive board menu where you configure a board connection (including its Ethernet address), card index, and module slot. After selecting the module you choose the RT channel and address; the RT then runs under processor control, and you can listen for events for a chosen duration.
Board Connection and Module Selection
Note
This startup sequence is common to all NAI sample applications. The board connection and module selection code shown here is not specific to 1553.
The main() function follows the standard SSK 1.x startup flow and hands a valid module to Run_SUM1553_RT_ProcCtrl(), which reads the board’s Ethernet settings from the system configuration, sets up the Ethernet IDR, then configures the RT.
Important
Common connection errors you may encounter at this stage:
- No board found / connection timeout — verify the board is powered and connected; check
default_SUM1553_RTProc.txtor reconfigure in the board menu.- No events ever arrive — confirm the board’s IP/port are correct, that interrupts are routed over Ethernet, and that no firewall is dropping the board’s unprompted messages.
- “Module selected does not support Summit 1553 Functionality” — the selected module is not a Summit (FT) 1553 module.
How Processor Control Differs
In the ping-pong sample the host is in charge of servicing buffers: it polls each subaddress’s Block Accessed bit and reads the ones with new data. Under processor control, the onboard 1553 processor does that watching. When a message is received on a subaddress whose interrupt is enabled, the processor records an event on the Event FIFO and raises an interrupt. The interrupt is delivered to the host as an Ethernet IDR, so the host is notified of new data rather than having to poll for it. Host-initiated changes (like new transmit data) flow the other way, through the Request FIFO.
Important
While processor control is enabled, the host must not access the core memory directly — doing so can disturb the processor’s internal “page” register and cause unpredictable behavior. Use the FIFO-based calls (
naibrd_SUM1553_Proc_RT_LoadDataBlock(), and event decode via IDR) instead of the directRT_LoadTxDataBlock()/RT_ReadRxDataBlock()calls used by the ping-pong sample.
Setting Up the Ethernet IDR (Event Delivery)
Setup_SUM1553_EthernetIDR() opens a host socket for the replies, routes interrupts over Ethernet, and configures event 0 to fire on any subaddress and deliver its event buffer to the host:
/* Open a socket to receive interrupt-driven replies, and route interrupts over Ethernet */
nai_ether_Open(idrsock, bUDP, brdipaddr, szport, 500);
nai_ether_GetSockInfo(*idrsock, &type, ip, &port);
naibrd_DirectInterrupts(cardIndex, NAI_INTF_ETHER);
/* Event 0: trigger on a message to any subaddress, generate a vector, and send the event buffer to the host */
naibrd_SUM1553_Proc_RT_SetEventSAMask(cardIndex, module, rtchan, 0, 0xFFFFFFFF);
naibrd_SUM1553_Proc_SetEventVector(cardIndex, module, rtchan, 0, EVENT0_VECTOR);
naibrd_SUM1553_Proc_SetEventUPR(cardIndex, module, rtchan, 0, type | NAI_ETHER_UPR_TYPE_IDR, ip, port, EVENT0_SEQHI, EVENT0_VECTOR);nai_status_t naibrd_DirectInterrupts(int32_t cardIndex, nai_intf_t intf)— routes the card’s interrupts to an interface;NAI_INTF_ETHERsends them out over Ethernet.nai_status_t naibrd_SUM1553_Proc_RT_SetEventSAMask(int32_t cardIndex, int32_t module, int32_t channel, int32_t event, uint32_t samask)— ties a processor event to a set of subaddresses.0xFFFFFFFFtriggers event 0 on a message to any subaddress.nai_status_t naibrd_SUM1553_Proc_SetEventVector(int32_t cardIndex, int32_t module, int32_t channel, int32_t event, uint16_t vector)— assigns the interrupt vector generated when the event fires.nai_status_t naibrd_SUM1553_Proc_SetEventUPR(int32_t cardIndex, int32_t module, int32_t channel, int32_t slot, nai_ether_upr_type_t uprtype, uint8_t ip[], uint16_t port, uint8_t seqhi, uint16_t vector)— configures the unprompted reply: whenvectoris generated, the board reads the event buffer and sends it toip:port.NAI_ETHER_UPR_TYPE_IDRselects the interrupt-driven-reply type, andseqhitags the reply so the host can recognize it.
nai_ether_Open() and nai_ether_GetSockInfo() are common Ethernet helpers (not 1553-specific) that establish the host-side socket and report its callback address.
Configuring the RT for Processor Control
Setup_SUM1553_RT_ProcCtrl() resets the channel and applies the RT identity configuration — the same SetMode(RT_MODE) / SetBusEnable / SetAddress / ConfigureForPingPong / SetPingPongEnable / Legalize sequence documented in the ping-pong guide — plus the interrupt and processor-enable steps that make processor control work:
naibrd_SUM1553_SetInterruptMask(cardIndex, module, rtchan, NAI_SUM1553_INTERRUPT_SUBA); /* enable subaddress interrupts */
/* ... RT identity setup (mode, buses, address, ping-pong, legalize) ... */
for (sa = 1; sa <= 30; sa++)
naibrd_SUM1553_RT_SetSAMCInterruptMask(cardIndex, module, rtchan, NAI_SUM1553_SAMCTYPE_RX, sa, NAI_SUM1553_SA_IRQ_ACCESS);
naibrd_SUM1553_SetInterruptVector(cardIndex, module, rtchan, INTERRUPT_VECTOR);
/* Enable processor control */
naibrd_SUM1553_Proc_ClearFifo(cardIndex, module, rtchan, NAI_SUM1553_PROC_FIFO_ALL);
naibrd_SUM1553_Proc_SetCtrl(cardIndex, module, rtchan, NAI_SUM1553_PROC_CTRL_ENABLE);nai_status_t naibrd_SUM1553_SetInterruptMask(int32_t cardIndex, int32_t module, int32_t channel, nai_sum1553_interrupt_t mask)— enables channel-level interrupt sources.NAI_SUM1553_INTERRUPT_SUBAenables subaddress interrupts, which is what lets received messages trigger processor events.nai_status_t naibrd_SUM1553_RT_SetSAMCInterruptMask(int32_t cardIndex, int32_t module, int32_t channel, nai_sum1553_samctype_t samctype, uint16_t samc, nai_sum1553_sa_irq_t mask)— enables interrupts for a specific subaddress. Here every receive subaddress (1–30) is set to interrupt on access (NAI_SUM1553_SA_IRQ_ACCESS).nai_status_t naibrd_SUM1553_SetInterruptVector(int32_t cardIndex, int32_t module, int32_t channel, uint32_t vector)— sets the channel interrupt vector (kept distinct from the event vector).nai_status_t naibrd_SUM1553_Proc_ClearFifo(int32_t cardIndex, int32_t module, int32_t channel, nai_sum1553_procfifo_t fifos)— clears the processor FIFOs;NAI_SUM1553_PROC_FIFO_ALLclears them all before starting.nai_status_t naibrd_SUM1553_Proc_SetCtrl(int32_t cardIndex, int32_t module, int32_t channel, nai_sum1553_procctrl_t mask)— configures processor control;NAI_SUM1553_PROC_CTRL_ENABLEturns it on. (Ping-pong passes0here to leave it off.) SettingNAI_SUM1553_PROC_CTRL_HPRIOREQadditionally makes Request-FIFO updates take priority over message interrupts.
The RT is then enabled with naibrd_SUM1553_EnableExecution(... 1).
Receiving Events over Ethernet
Retrieve_SUM1553_ProcBCRTMessages() listens on the IDR socket for a chosen number of seconds, decodes each event message, and prints subaddress data that has changed:
end = time(NULL) + duration;
while (time(NULL) < end)
{
offset = nai_ether_ReceiveMessage(idrsock, idrmsg, sizeof(idrmsg), &seq, &tc, gen, &size, 5000);
if (offset < 0) continue; /* timed out */
if ((seq >> 8) == EVENT0_SEQHI) /* our event-0 reply */
{
if (naibrd_SUM1553_Proc_ProcessEventUPR(cardIndex, module, rtchan, idrmsg, tc, gen, offset,
&event, &samctype, &rxsa, &rxwordcnt, &info, ×tamp,
NULL, NULL, rxdatablock) >= 0)
{
switch (event)
{
case NAI_SUM1553_EVENT_TYPE_SA: /* a subaddress message -- print if data changed */
...
break;
case NAI_SUM1553_EVENT_TYPE_ERROR:
printf("Received error event: %04x\n", info);
break;
}
}
}
}nai_status_t naibrd_SUM1553_Proc_ProcessEventUPR(int32_t cardIndex, int32_t module, int32_t channel, uint8_t msg[], nai_ether_typecode_t typecode, nai_ether_gen_t gen, int32_t offset, nai_sum1553_eventtype_t* outevent, nai_sum1553_samctype_t* outtype, uint16_t* outsa, uint16_t* outwordcount, uint16_t* outinfo, uint16_t* outtimestamp, uint16_t outcmd[2], uint16_t outstatus[2], uint16_t data[32])— decodes a received event IDR into its event type, subaddress, word count, time tag, and data. Theoutcmd/outstatuspointers may beNULLwhen not needed.NAI_SUM1553_EVENT_TYPE_SA— a subaddress-message event (data received);NAI_SUM1553_EVENT_TYPE_ERROR— an error event, with details ininfo.
nai_ether_ReceiveMessage() is the common Ethernet helper that blocks (with a timeout) for the next reply; the seqhi byte set during IDR setup lets the loop confirm the message is the expected event 0.
Updating Transmit Data via the Request FIFO
Pressing U calls Update_SUM1553_ProcRTSAXmitData(), which — because the host must not write core memory directly under processor control — places the new transmit data on the Request FIFO:
naibrd_SUM1553_Proc_RT_LoadDataBlock(cardIndex, module, rtchan,
NAI_SUM1553_SAMCTYPE_SA | NAI_SUM1553_SAMCTYPE_TX,
sa, txdatablock, 0, 32);nai_status_t naibrd_SUM1553_Proc_RT_LoadDataBlock(int32_t cardIndex, int32_t module, int32_t channel, nai_sum1553_samctype_t samctype, uint16_t subaddr, const uint16_t datablock[], uint16_t offset, uint16_t count)— queues a data-block update on the Request FIFO for the processor to apply.samctypeselects the transmit subaddress descriptor;offsetandcountbound the words written (here 0 and 32).
This is the processor-control counterpart to the ping-pong sample’s naibrd_SUM1553_RT_LoadTxDataBlock() — no ping-pong disable/enable handshake is needed, because the processor serializes the update through the FIFO.
Troubleshooting Reference
This table summarizes common errors and symptoms covered above. Consult your module’s manual for hardware-specific diagnostics.
| Error / Symptom | Possible Causes | Suggested Resolution |
|---|---|---|
| No board found or connection timeout | Board not powered, incorrect or missing config file, network issue | Verify hardware; check default_SUM1553_RTProc.txt or reconfigure in the board menu. |
| No events ever arrive | IDR not set up, interrupts not routed to Ethernet, or firewall dropping replies | Confirm the board IP/port, that naibrd_DirectInterrupts(NAI_INTF_ETHER) succeeded, and that inbound Ethernet from the board is allowed. |
| Events arrive but data looks wrong / stale | Reading core memory directly under processor control | Use the FIFO path: decode via Proc_ProcessEventUPR() and update via Proc_RT_LoadDataBlock(); don’t call the direct RT read/load functions while processor control is on. |
| RT never interrupts on receive | Subaddress interrupts not enabled | Enable NAI_SUM1553_INTERRUPT_SUBA and per-SA NAI_SUM1553_SA_IRQ_ACCESS, and legalize the receive subaddresses. |
| ”Received unknown message” printed | A reply arrived whose sequence tag isn’t the configured event | Confirm the seqhi used in Proc_SetEventUPR() matches what the receive loop checks. |
| Transmit updates seem ignored | Request not being serviced, or priority contention | Ensure processor control is enabled; consider NAI_SUM1553_PROC_CTRL_HPRIOREQ to prioritize requests over message interrupts. |
Full Source
The complete source for this sample is provided below for reference. The sections above explain each part in detail.
Full Source — SUM1553_RT_ProcCtrl.c (SSK 1.x)
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <time.h>
#include <ctype.h>
/* Common Sample Program include files */
#include "include/naiapp_boardaccess_menu.h"
#include "include/naiapp_boardaccess_query.h"
#include "include/naiapp_boardaccess_access.h"
#include "include/naiapp_boardaccess_display.h"
#include "include/naiapp_boardaccess_utils.h"
/* Common 1553 Sample Program include files */
#include "nai_1553_utils.h"
/* naibrd include files */
#include "nai.h"
#include "naibrd.h"
#include "functions/naibrd_sum1553.h"
#include "advanced/nai_ether_adv.h"
/* Extern Functions or Variables*/
extern NAIAPPFUNC naiapp_syscfg_access_t g_NAISysCfgAccess[NAI_MAX_CARDS];
static const int8_t *CONFIG_FILE = (int8_t *)"default_SUM1553_RTProc.txt";
/* Function prototypes */
static bool_t Run_SUM1553_RT_ProcCtrl(int32_t cardIndex, int32_t module, uint32_t modid);
static void Setup_SUM1553_EthernetIDR(int32_t cardIndex, int32_t module, int32_t rtchan, int8_t *brdipaddr, bool_t bUDP, int8_t *szport, nai_socket_t *idrsock);
static void Setup_SUM1553_RT_ProcCtrl(int32_t cardIndex, int32_t module, int32_t rtchan, uint8_t rtaddr);
static void Retrieve_SUM1553_ProcBCRTMessages(int32_t cardIndex, int32_t module, int32_t rtchan, nai_socket_t idrsock, int32_t duration);
static void Update_SUM1553_ProcRTSAXmitData(int32_t cardIndex, int32_t module, int32_t rtchan, uint8_t increment);
int32_t GetBoardIndex(int32_t CardIndex);
static const int32_t DEF_RT_CHANNEL = 1;
static const uint8_t DEF_RT_ADDRESS = 1;
static const uint8_t DEF_RT_SUBADDR = 3;
static const uint8_t EVENT0_SEQHI = 0x99;
static uint16_t datablock[32][32];
/**************************************************************************************************************/
/**
<summary>
The purpose of the SUM1553_RT_ProcCtrl is to illustrate the methods to call in the naibrd library to configure
the 1553 channel as a Remote Terminal with the 1553 Processor Enabled to handle retrieving BC-RT messages and
placing these messages on the "Event" FIFO. This application will configure an IDR (Interrupt Driven Reply)
Ethernet message so that messages placed on the "Event" FIFO by the 1553 Processor are automatically sent to the
host as Unprompted Relies (UPRs) when the 1553 Processor generates an interrupt after placing a 1553 message
on the "Event" FIFO.
The following system configuration routines from the nai_sys_cfg.c file are called to assist with the configuration
setup for this program prior to calling the naibrd 1553 routines.
- ConfigDevice
- DisplayDeviceCfg
- GetBoardSNModCfg
- CheckModule
Note, the SUM1553_RT_ProcCtrl can run in conjunction with the SUM1553_BC_Scheduler applications to illustrate
BC and RT operations together with the NAI 1553 module.
</summary>
*/
/**************************************************************************************************************/
#if defined (__VXWORKS__)
int32_t SUM1553_RT_ProcCtrl(void)
#else
int32_t main(void)
#endif
{
bool_t stop = FALSE;
int32_t cardIndex;
int32_t moduleCnt;
int32_t module;
uint32_t moduleID = 0;
int8_t inputBuffer[80];
int32_t inputResponseCnt;
if (naiapp_RunBoardMenu(CONFIG_FILE) == TRUE)
{
while (stop != TRUE)
{
/* Query the user for the card index */
stop = naiapp_query_CardIndex(naiapp_GetBoardCnt(), 0, &cardIndex);
if (stop != TRUE)
{
check_status(naibrd_GetModuleCount(cardIndex, &moduleCnt));
/* Query the user for the module number */
stop = naiapp_query_ModuleNumber(moduleCnt, 1, &module);
if (stop != TRUE)
{
moduleID = naibrd_GetModuleID(cardIndex, module);
if ((moduleID != 0))
{
Run_SUM1553_RT_ProcCtrl(cardIndex, module, moduleID);
}
}
}
printf("\nType Q to quit or Enter key to restart application:\n");
stop = naiapp_query_ForQuitResponse(sizeof(inputBuffer), NAI_QUIT_CHAR, inputBuffer, &inputResponseCnt);
}
}
printf("\nType the Enter key to exit the program: ");
naiapp_query_ForQuitResponse(sizeof(inputBuffer), NAI_QUIT_CHAR, inputBuffer, &inputResponseCnt);
naiapp_access_CloseAllOpenCards();
return 0;
}
/**************************************************************************************************************/
/**
<summary>
Run_SUM1553_RT_ProcCtrl queries the user for the module and channel to configure as the Remote Terminal (RT).
After getting the module/channel selection, Setup_SUM1553_EthernetIDR() is invoked to configure the host to
handle Ethernet messages in response to the Interrupt from the 1553 Processor. Setup_SUM1553_RT_ProcCtrl() is
invoked to configure the 1553 channel for 1553 Processor RT control.
Once the Processor Controlled RT is configured and running, the user can:
1) Type 'U' to place a message on the "Request" FIFO to change the data for the RT-BC message.
2) Type a numeric duration (in seconds) value to view the BC-RT messages that are received from all subaddresses.
3) Type 'Q' to quit stop the RT execution and exit the routine.
</summary>
*/
/**************************************************************************************************************/
static bool_t Run_SUM1553_RT_ProcCtrl(int32_t cardIndex, int32_t module, uint32_t modid)
{
bool_t bQuit = FALSE;
bool_t bContinue = TRUE;
int32_t rtchan = 1;
uint8_t rtaddr = 1;
int32_t brdIndex = -1;
bool_t bUDP;
int8_t szPort[NAI_MAX_PORT_LEN];
nai_socket_t idrsock = (nai_socket_t)-1;
int32_t duration = 5;
uint8_t increment = 0;
int8_t inputBuffer[80];
int32_t inputResponseCnt;
bQuit = Get1553RTCfg(modid, DEF_RT_CHANNEL, DEF_RT_ADDRESS, &rtchan, &rtaddr);
if (!bQuit)
{
brdIndex = GetBoardIndex(cardIndex);
if (brdIndex != -1)
{
if (strlen((const char*)g_NAISysCfgAccess[brdIndex].etherCfg.ipAddress) > 0)
{
if (g_NAISysCfgAccess[brdIndex].comm == NAIBRD_COMM_ETHER_UDP)
{
bUDP = TRUE;
strcpy((char *)szPort, "1044");
}
else
{
bUDP = FALSE;
strcpy((char *)szPort, "23");
}
Setup_SUM1553_EthernetIDR(cardIndex, module, rtchan, g_NAISysCfgAccess[brdIndex].etherCfg.ipAddress, bUDP, &szPort[0], &idrsock);
}
Setup_SUM1553_RT_ProcCtrl(cardIndex, module, rtchan, rtaddr);
while (bContinue)
{
printf("\nType U to update the subaddress transmit data or duration for RT test or %c to quit (default: 5) : ", NAI_QUIT_CHAR);
bQuit = naiapp_query_ForQuitResponse(sizeof(inputBuffer), NAI_QUIT_CHAR, inputBuffer, &inputResponseCnt);
if (!bQuit)
{
if (toupper(inputBuffer[0]) == 'U')
{
increment++;
Update_SUM1553_ProcRTSAXmitData(cardIndex,module,rtchan,increment);
}
else
{
if (inputResponseCnt == 0)
duration = 5;
else
duration = (int32_t)atol((const char*)inputBuffer);
Retrieve_SUM1553_ProcBCRTMessages(cardIndex, module, rtchan, idrsock, duration);
}
}
else
bContinue = FALSE;
}
/* Disable the RT */
check_status(naibrd_SUM1553_EnableExecution(cardIndex,module,rtchan,0));
}
}
return bQuit;
}
/**************************************************************************************************************/
/**
<summary>
Setup_SUM1553_EthernetIDR() is invoked to configure the host to handle Ethernet messages in response to the
Interrupt from the 1553 Processor as well as setting up the board to generate the an Ethernet message when the
Interrupt occurs.
</summary>
*/
/**************************************************************************************************************/
static void Setup_SUM1553_EthernetIDR(int32_t cardIndex, int32_t module, int32_t rtchan, int8_t *brdipaddr, bool_t bUDP, int8_t *szport, nai_socket_t *idrsock)
{
nai_ether_upr_type_t type;
uint8_t ip[NAI_MAX_IP_LEN];
uint16_t port;
const uint16_t EVENT0_VECTOR = 0x12;
/* Open connection to receive our interrupt driven replies (IDRs) */
check_status(nai_ether_Open(idrsock, bUDP, (const char*)brdipaddr, (const char*)szport, 500));
check_status(nai_ether_GetSockInfo(*idrsock,&type,ip,&port)); /* Retrieve callback information for IDR socket */
check_status(naibrd_DirectInterrupts(cardIndex,NAI_INTF_ETHER)); /* Send any interrupts we get over ethernet */
/* Event Setup */
check_status(naibrd_SUM1553_Proc_RT_SetEventSAMask(cardIndex,module,rtchan,0,0xFFFFFFFF)); /* Trigger event 0 when we receive a message on any subaddress */
check_status(naibrd_SUM1553_Proc_SetEventVector(cardIndex,module,rtchan,0,EVENT0_VECTOR)); /* Generate interrupt vector EVENT0_VECTOR when event 0 is triggered */
/* Configure our IDR */
check_status(naibrd_SUM1553_Proc_SetEventUPR(cardIndex,module,rtchan,0,type | NAI_ETHER_UPR_TYPE_IDR,ip,port,EVENT0_SEQHI,EVENT0_VECTOR)); /* Read from the event buffer when EVENT0_VECTOR is generated and send the contents to the host */
}
/**************************************************************************************************************/
/**
<summary>
Setup_SUM1553_RT_ProcCtrl() configures the 1553 channel for 1553 Processor RT control.
</summary>
*/
/**************************************************************************************************************/
static void Setup_SUM1553_RT_ProcCtrl(int32_t cardIndex, int32_t module, int32_t rtchan, uint8_t rtaddr)
{
bool_t resetting;
uint16_t sa;
const uint16_t INTERRUPT_VECTOR = 0x10; /* Make sure this doesn't overlap with EVENT0_VECTOR */
/* Reset the channel */
check_status(naibrd_SUM1553_Reset(cardIndex,module,rtchan));
/* Wait for channels to reset */
while(check_status(naibrd_SUM1553_IsResetting(cardIndex,module,rtchan,&resetting)) == NAI_SUCCESS && resetting);
/* Configure RT */
check_status(naibrd_SUM1553_SetMode(cardIndex,module,rtchan,NAI_SUM1553_OPSTATUS_RT_MODE)); /* Configure as RT */
check_status(naibrd_SUM1553_SetInterruptMask(cardIndex,module,rtchan,NAI_SUM1553_INTERRUPT_SUBA)); /* Enable SUBA interrupts. This is necessary to trigger events when a message is received. */
check_status(naibrd_SUM1553_RT_SetBusEnable(cardIndex,module,rtchan,1,1)); /* Enable bus A and bus B */
check_status(naibrd_SUM1553_RT_SetAddress(cardIndex,module,rtchan,rtaddr)); /* Set RT address */
check_status(naibrd_SUM1553_RT_ConfigureForPingPong(cardIndex,module,rtchan)); /* Set up descriptor table with ping pong buffers */
check_status(naibrd_SUM1553_RT_SetPingPongEnable(cardIndex,module,rtchan,1)); /* Enable ping pong */
for (sa = 1; sa <= 30; sa++)
check_status(naibrd_SUM1553_RT_SetSAMCInterruptMask(cardIndex,module,rtchan,NAI_SUM1553_SAMCTYPE_RX,sa,NAI_SUM1553_SA_IRQ_ACCESS)); /* Enable Rx interrupts for subaddress */
check_status(naibrd_SUM1553_RT_Legalize(cardIndex,module,rtchan,NAI_SUM1553_SAMCTYPE_RX,0xFFFFFFFF,1)); /* Legalize the subaddresses we want for rx */
check_status(naibrd_SUM1553_RT_Legalize(cardIndex,module,rtchan,NAI_SUM1553_SAMCTYPE_TX,0xFFFFFFFF,1)); /* Legalize the subaddresses we want for tx*/
check_status(naibrd_SUM1553_SetInterruptVector(cardIndex,module,rtchan,INTERRUPT_VECTOR));
/* Enable processor control */
check_status(naibrd_SUM1553_Proc_ClearFifo(cardIndex,module,rtchan,NAI_SUM1553_PROC_FIFO_ALL));
check_status(naibrd_SUM1553_Proc_SetCtrl(cardIndex,module,rtchan,NAI_SUM1553_PROC_CTRL_ENABLE));
/* Load the subaddress transmit data */
Update_SUM1553_ProcRTSAXmitData(cardIndex,module,rtchan,0);
/* Run the RT */
check_status(naibrd_SUM1553_EnableExecution(cardIndex,module,rtchan,1));
}
/**************************************************************************************************************/
/**
<summary>
Retrieve_SUM1553_ProcBCRTMessages waits from a message from the Interrupt Driven Reply socket. Note to avoid
the constant output of messages, this routine will compare the data previous read from the current one received
and only display the message if the data has changed.
This routine will run for the period as specified by the duration in seconds passed in.
</summary>
*/
/**************************************************************************************************************/
static void Retrieve_SUM1553_ProcBCRTMessages(int32_t cardIndex, int32_t module, int32_t rtchan, nai_socket_t idrsock, int32_t duration)
{
time_t end;
uint8_t idrmsg[NAI_ETHER_MAX_MESSAGE];
uint16_t seq;
nai_ether_gen_t gen = NAI_ETHER_GEN3;
nai_ether_typecode_t tc;
int32_t size, offset;
uint16_t rxdatablock[32], rxwordcnt;
int32_t i;
bool_t bNewMsg;
end = time(NULL) + duration;
while (time(NULL) < end)
{
/* Receive a message from the IDR socket */
offset = nai_ether_ReceiveMessage(idrsock,idrmsg,sizeof(idrmsg),&seq,&tc,gen,&size,5000);
if (offset < 0) /* Timed out */
continue;
if ((seq >> 8) == EVENT0_SEQHI) /* Received our event 0 message */
{
uint16_t timestamp;
uint16_t rxsa,info;
nai_sum1553_samctype_t samctype;
nai_sum1553_eventtype_t event;
if (naibrd_SUM1553_Proc_ProcessEventUPR(cardIndex,module,rtchan,idrmsg,tc,gen,offset,&event,&samctype,&rxsa,&rxwordcnt,&info,×tamp,NULL,NULL,rxdatablock) >= 0) /* Decode IDR */
{
switch (event) /* What happened? */
{
case NAI_SUM1553_EVENT_TYPE_SA:
/* Only display if data from the subaddress is different from previous data received */
if (rxwordcnt == 0)
rxwordcnt = 32;
bNewMsg = FALSE;
for (i = 0; i < rxwordcnt; i++)
{
if (rxdatablock[i] != datablock[rxsa][i])
{
bNewMsg = TRUE;
break;
}
}
if (bNewMsg)
{
for (i = 0; i < rxwordcnt; i++)
datablock[rxsa][i] = rxdatablock[i];
printf("SA %d: ",rxsa);
printf("TimeTag: %04X ", timestamp);
printf("Data: ");
for (i = 0; i < rxwordcnt; ++i)
{
if (i != 0)
printf(",");
printf("%04X", rxdatablock[i]);
}
printf("\n");
}
break;
case NAI_SUM1553_EVENT_TYPE_ERROR:
printf("Received error event: %04x\n",info);
break;
}
}
}
else
{
printf("Received unknown message with seq %04x\n",seq);
}
}
}
/**************************************************************************************************************/
/**
<summary>
Update_SUM1553_ProcRTSAXmitData changes the data that is sent in response to the RT-BC messages sent to the
"DEF_RT_SUBADDR" Subaddress. The naibrd_SUM1553_Proc_RT_LoadDataBlock() is called to place the updated data on
the "Request" FIFO. Note, while in Processor controlled mode, the host should not access the Core memory directly.
Doing so may result in changing the value of the "page" register resulting in unpredictable behavior.
If the NAI_SUM1553_PROC_CTRL_HPRIOREQ is enabled (1), the requests will have higher priority
than the 1553 message interrupts.
</summary>
*/
/**************************************************************************************************************/
static void Update_SUM1553_ProcRTSAXmitData(int32_t cardIndex, int32_t module, int32_t rtchan, uint8_t increment)
{
uint16_t sa = DEF_RT_SUBADDR;
uint16_t txdatablock[32];
uint8_t msb, lsb;
int32_t i;
msb = (uint8_t)(sa << 4) + (increment & 0x0F); /* upper byte (subaddress=upper 4 bits | increment=lower 4 bits)) */
lsb = 0;
for (i = 0; i < 32; i++)
{
txdatablock[i] = (msb << 8) | (uint8_t)(lsb + i); /* incremental data */
}
/* Update the data */
check_status(naibrd_SUM1553_Proc_RT_LoadDataBlock(cardIndex, module, rtchan, NAI_SUM1553_SAMCTYPE_SA | NAI_SUM1553_SAMCTYPE_TX, sa, txdatablock, 0, 32));
}
int32_t GetBoardIndex(int32_t CardIndex)
{
int32_t brdIndex = -1;
int32_t i;
for (i = 0; i < naiapp_GetBoardCnt(); i++)
{
if (g_NAISysCfgAccess[i].cardIndex == CardIndex)
{
brdIndex = i;
break;
}
}
return brdIndex;
}