Glossary

Overview

This glossary defines the abbreviations and technical terms you’ll come across throughout NAI’s documentation. Terms are grouped by topic, and listed alphabetically within each section.

Hardware & form factor

• Backplane — The board at the rear of a chassis that distributes power and data between the SBC and the I/O boards plugged into it.
• Breakout board — A small adapter board that exposes a module’s I/O on accessible connectors (e.g. NAI’s 44-pin breakout boards) for bench testing.
• Chassis — The enclosure that houses a motherboard and its modules and connects them through a backplane.
• COSA (Configurable Open System Architecture) — NAI’s open architecture that lets one motherboard be populated with a configurable mix of function modules.
• FACE (Future Airborne Capability Environment) — An Open Group technical standard for software portability and reuse across military services and platforms; MOSA calls for FACE-conformant operating systems.
• Gen5 / Gen6 — NAI hardware-generation labels. Gen5 covers the earlier Xilinx Zynq / PowerPC platforms; Gen6 the newer generation. The generation can affect which SSK and features apply.
• I/O board — A board with no onboard processor (e.g. 75G5, 68G5, 67G6, 68G6). Used as a slave inside an SIU chassis, or accessed from a host PC over Ethernet.
• Module — A function card (AD, DT, SC, etc.) that plugs into a motherboard slot to provide a specific I/O or measurement capability.
• MOSA (Modular Open Systems Approach) — The US DoD acquisition and design strategy that mandates open-standard architectures within platforms and their major components, to increase competition, speed technology refresh, cut cost, and improve interoperability; NAI’s COSA products are built to support it.
• Motherboard — The carrier board that holds the processor (on an SBC) and the module slots; NIU/CIU products are complete motherboards.
• NIU / CIU — Complete motherboards with an integrated processor — standalone SBCs in their own right, not chassis. All currently available NIU and CIU products use SSK 2.x.
• PCIe (PCI Express) — A high-speed bus used to connect some NAI boards directly to a host (e.g. 79G5, 79C3) instead of over Ethernet.
• SBC (Single Board Computer) — A board with its own onboard processor — e.g. 68ARM4, 75ARM1, 68INT6, 67PPC2, NIU3A, CIU3. Your code runs here in onboard deployments.
• SIU — A multi-board system: a master SBC plus one or more I/O boards (slaves) on a backplane. SSK choice depends on the SBC inside.
• Slot — A position in the motherboard/backplane into which a module is inserted; each slot has its own address.
• SOSA (Sensor Open Systems Architecture) — One of the open standards under the MOSA umbrella; a consensus-based, non-proprietary standard that unifies VITA and service-specific open-systems standards for sensor systems and favors modularity at key interfaces.
• SWaP-optimized — Designed to minimize Size, Weight, and Power — a key goal for rugged embedded mil-aero hardware.
• VME — A long-established backplane bus standard; some NAI systems connect over VME instead of Ethernet or PCIe.
• VPX (VITA 46 / OpenVPX) — A rugged, high-speed backplane standard used for NAI’s VPX form-factor systems.

Connections & interfaces

• Baud rate — The speed of a serial connection in bits per second. NAI’s standard serial console runs at 115200 baud.
• DB-9 — The 9-pin D-sub connector commonly used for the serial console.
• Flow control — Serial handshaking that paces data between two devices. NAI’s standard console setting is None.
• FTP / TFTP — File-transfer protocols used to move images and modules onto VxWorks targets.
• HDMI connector — On most NAI ARM target boards the serial console and primary Ethernet are routed through the front HDMI connector (a MIL connector on ruggedized units); an adapter breaks it out into a DB-9 serial port and an RJ-45 Ethernet jack.
• I2C — A two-wire serial bus used for low-speed on-board device communication.
• Loopback — A test mode where a port’s output is fed back to its own input to verify the link without external hardware.
• NAI Ethernet Listener — The board-side process that accepts NAI Ethernet-protocol connections from a host (ESP2, your host application). Default ports are TCP/UDP 52801 and 52802.
• Native PCI bus — Direct PCI/PCIe enumeration of a board by the host, rather than communicating over Ethernet.
• Parity — An optional serial error-check bit. NAI’s standard console setting is None.
• Ping — A basic network command used to confirm the host can reach the board’s IP address.
• RJ-45 — The standard 8-pin Ethernet jack/connector.
• SCP / SFTP — Secure file-transfer protocols (over SSH) used to copy a built ELF onto a PetaLinux board, e.g. with WinSCP.
• SerDes (Serializer/Deserializer) — Converts parallel data to a high-speed serial link and back, used on high-speed board interconnects.
• Serial debug port (serial console) — The serial connection used to log into the board, watch boot messages, and view application output.
• Stop bits — Serial framing bits that mark the end of a character. NAI’s standard console setting is 1.
• TCP / UDP — The two transport protocols that carry the NAI Ethernet protocol; TCP is connection-oriented, UDP is connectionless.
• Vendor ID (PCI) — NAI’s PCI/cPCI/PCIe vendor ID is 0x15AC; use it to identify NAI cards when enumerating a bus (e.g. lspci).

Software & development

• BSP (Board Support Package) — The board-specific software layer (drivers, boot, configuration) that lets an OS run on a particular NAI board; e.g. the VxWorks naiNIU3A BSP.
• chmod — The Linux command that marks a transferred file executable (e.g. chmod 777 your_app.elf) before you run it.
• CMake — The build-configuration tool that generates the build for SSK applications across host and target toolchains.
• Cross-compile — Building an application on a dev PC for a different target architecture (e.g. ARM), then transferring the binary to the board to run.
• Deos — A partition-based real-time OS (RTOS) from DDC-I supported on some NAI boards; built with the OpenArbor IDE.
• EEPROM — Non-volatile motherboard memory that stores the board’s IP, MAC, and platform settings; read and written with naiMBEEPROMUtil.
• ELF file — The compiled executable (.elf) produced by the build that you transfer to and run on the board.
• ESP2 (Embedded Soft Panel 2) — NAI’s host-side GUI for exercising the modules on a board without writing any code.
• External / remote host — A deployment where the SSK application runs on a separate Windows or Linux PC and talks to the board over Ethernet.
• GUI (Graphical User Interface) — A point-and-click interface, e.g. ESP2.
• IDE (Integrated Development Environment) — The application you write and build code in (Vitis, Wind River Workbench, OpenArbor, Visual Studio).
• naiMBEEPROMUtil — A board-side utility that reads and writes the motherboard EEPROM (IP, subnet, gateway, etc.).
• Onboard — A deployment where the SSK application runs on the SBC’s own processor.
• OpenArbor — DDC-I’s IDE, used to build Deos targets.
• PetaLinux — The embedded Linux distribution that runs on NAI ARM boards.
• PuTTY / TeraTerm / minicom — Serial-terminal programs used to open a console to the board (PuTTY/TeraTerm on Windows, minicom on Linux).
• RTOS (Real-Time Operating System) — An OS with deterministic timing guarantees (e.g. VxWorks, Deos).
• SSK (Software Support Kit) — NAI’s software package: the naibrd_* library APIs your application links against, plus sample apps and tools. Comes in 1.x and 2.x generations.
• Toolchain — The compiler, linker, and libraries used to build for a specific target, selected via a CMake toolchain file.
• Vitis — Xilinx’s IDE for building ARM Linux / PetaLinux applications (the successor to Xilinx SDK).
• Vivado / Xilinx SDK — Xilinx’s earlier FPGA/ARM development tools — the predecessors to Vitis, referenced in NAI’s older ARM Linux guides.
• VxWorks — Wind River’s real-time OS supported on some NAI boards; built with Wind River Workbench.
• Wind River Workbench — The IDE for building VxWorks 7 targets.
• WinSCP — A Windows SCP/SFTP client for transferring files (such as the ELF) to the board.

SSK API parameters

These are the arguments that appear in nearly every naibrd_* call and are passed to every sample-application handler. They identify what a call acts on: which board, which slot, which channel.

• cardIndex — Identifies which board a call applies to in a multi-board system. Zero-based. Established at startup from the board menu (naiapp_query_CardIndex()).
• channel — Selects which channel on a module a call applies to. One-based; many sample handlers treat a value of 0 as a sentinel meaning “apply to all channels.”
• module — Identifies which slot the target module occupies (see Slot). One-based. Note: despite the name, this argument is the slot number — not the module type or its ID.
• moduleID / modId — The identifier for the specific module type detected in a slot, returned by naibrd_GetModuleID(). API functions use it to apply module-specific behavior, and it is passed to naibrd_XX_GetChannelCount() to determine a module’s channel count.

Registers, status & interrupts

• BIT (Built-In Test) — Self-test capability that checks board and module health. NAI modules support three kinds:
  • PBIT (Power-On BIT) — runs automatically at startup.
  • CBIT (Continuous BIT) — runs in the background during normal operation.
  • IBIT (Initiated BIT) — runs on demand when triggered by the host.
• Dynamic (real-time) status — Live status that reflects the current condition of a signal and clears on its own once the condition goes away.
• Edge / level interrupt — Whether an interrupt triggers on a change of state (edge) or while a condition is held (level); set per source.
• Event-mapped vs channel-mapped interrupt — Whether an interrupt source is tied to a module-level event or to a specific channel.
• FIFO (First-In, First-Out) — A hardware buffer that queues data in arrival order, used for streaming or buffered I/O.
• Interrupt enable — The setting that allows a given source to actually generate an interrupt.
• ISR (Interrupt Service Routine) — The function that runs in response to an interrupt; it receives the vector number identifying the source.
• Latched status — “Sticky” status that records that a condition occurred and stays set until cleared by software, even after the condition itself has gone away.
• R/L (real-time / latched) status — The convention NAI modules and sample apps use to report each status condition twice: real-time (the condition right now) and latched (sticky until cleared). Shown side by side as R/L, where 0 = pass and 1 = fault. See Channel and BIT status.
• R/W (Read / Write) — Whether a register can be read, written, or both.
• Summary status — An aggregate of a channel’s individual status conditions; set if any one of them is set. Check it first, then drill down to the specific condition. See Channel and BIT status.
• Vector number — The value identifying which interrupt source fired, passed to the ISR.
• WDT (Watchdog Timer) — A timer that resets or flags the system if it isn’t periodically serviced, catching hangs.
  • Strobe / strobing — The periodic signal that proves the system is alive and keeps the watchdog from timing out.
  • Open window / quiet time — In a windowed watchdog, the period when exactly one strobe must arrive (open window) versus the period when no strobe is allowed (quiet time).

Signal & measurement types

• ADC / A/D (Analog-to-Digital Converter) — Converts an analog input voltage or current into a digital value (input modules such as AD).
• Current mode / voltage mode — Whether an analog output drives a current (e.g. a 4–20 mA loop) or a voltage; selectable on some D/A modules.
• DAC / D/A (Digital-to-Analog Converter) — Converts a digital value into an analog output (output modules such as DA).
• Differential I/O — Signaling that uses a pair of wires and the difference between them, improving noise immunity (DF modules).
• Discrete I/O — Simple on/off digital inputs and outputs (DT modules).
• Encoder — A device/interface that reports position or motion as digital counts (EC modules).
• Excitation — The voltage or current a module supplies to drive a sensor (e.g. bridge excitation for a strain gauge or LVDT).
• LVDT / RVDT — Linear / Rotary Variable Differential Transformer; position sensors that NAI modules measure or simulate.
• Ratiometric — A measurement taken relative to the excitation, so that excitation drift cancels out.
• Resolver — A rotary position sensor similar to a synchro, but with two stator outputs proportional to the sine and cosine of the shaft angle; measured by SD modules and simulated by DS modules. See Synchro & resolver terms below.
• RTD (Resistance Temperature Detector) — A temperature sensor whose resistance varies with temperature (RT/TR modules).
• SAR (Successive-Approximation Register) — A fast ADC architecture. Simultaneous SAR samples all channels at the same instant; multiplexed SAR shares one converter across channels in sequence.
• Sigma-Delta — A high-resolution (but slower) ADC architecture used on AD1–AD3.
• Strain gauge — A sensor whose resistance changes with mechanical strain; measured by SG modules.
• Synchro — An electromechanical rotary position sensor (a rotary transformer) whose three stator outputs, 120° apart, encode the shaft angle; measured by SD modules and simulated by DS modules. See Synchro & resolver terms below.
• Thermocouple — A temperature sensor that produces a small voltage from a junction of two metals (TC/TR modules).
• TTL / CMOS — Common digital logic-level standards for discrete I/O (TL modules).
• Variable reluctance (VR) — A passive sensor that produces a pulse as a toothed wheel passes; counted by VR modules.

Synchro & resolver terms

Terms used in the SD (measurement) and DS (simulation) module documentation and the Synchro & Resolver FAQs. Definitions are adapted from NAI’s synchro/resolver application notes and the Synchro/Resolver Handbook.

• Accuracy (angular) — The maximum difference between the angle a converter reports (or a simulator generates) and the true shaft angle, stated in arc-minutes or arc-seconds. NAI SD modules are rated at 1 arc-min single-speed; in a two-speed system the overall accuracy is the fine channel’s accuracy divided by the gear ratio. Distinct from resolution, which is the smallest angle step the converter can represent (e.g. 360° ÷ 2²⁴ for a 24-bit converter).
• Arc-minute / arc-second — Subdivisions of a degree used to state angular accuracy: 1 arc-minute (arc-min, ′) = 1/60°, and 1 arc-second (arc-sec, ″) = 1/3600°.
• CDX / RDX (control differential transmitter) — A synchro (CDX) or resolver (RDX) with a three-phase (or two-phase) stator and rotor. Inserted between a transmitter and a receiver, it adds or subtracts its own shaft angle from the signal passing through. A CDX presents a load to a D/S output just like a CT does; see VA Power Requirements.
• CT / RC (control transformer) — The receiver end of a synchro (CT) or resolver (RC) chain. Its stators are driven by the incoming signal and its rotor output falls to a null when the shaft matches the transmitted angle. A CT is the typical load a DS module drives; the 11CT4e is a common military example.
• CX / RX (control transmitter) — The transmitter end of a synchro (CX) or resolver (RX) chain: the rotor is excited by the reference and the stators output voltages whose amplitudes encode the shaft angle. A CX or RX is the type of sensor an SD module measures.
• D/S, D/R (digital-to-synchro, digital-to-resolver) — A converter that generates synchro or resolver signals from a digital angle. A unit that can output either format is written D/S-R; NAI’s DS modules are D/S-R converters.
• Drive capability (VA) — The load, in volt-amperes, that a D/S output can supply while staying within its accuracy specification. For a synchro CT load, VA ≈ ¾ (V_L-L)² ÷ |Zso|; for a resolver load, VA ≈ (V_L-L)² ÷ |Zso|. DS module models are rated at 0.5 VA to 8 VA per channel. See VA Power Requirements.
• Electrical zero — The shaft position that defines 0° for all angle readings and measurements. Under the standard conventions it is the position where the S1–S3 output (the sine output of a resolver) is at null with the other stator output(s) in phase with the reference; for a resolver the cosine output (S2–S4) is then at maximum coupling. Per MIL-S-20708 / MIL-R-21530, angle increases counter-clockwise from electrical zero as viewed from the shaft end.
• In-phase / quadrature component — The two parts of an AC signal relative to the reference: the in-phase component is in time phase with the reference (at the reference frequency), and the quadrature component is 90° out of phase with it. The angle information is carried in the in-phase component; quadrature is usually unwanted, and stray capacitive coupling in wiring is a common source. (Not to be confused with quadrature encoder signals — see Encoder.)
• Line-to-line voltage (VL-L, VLL) — The rms voltage measured between two stator lines of a synchro or resolver at maximum coupling; the “signal” voltage as opposed to the reference. Common levels are 11.8 V, 26 V and 90 V. NAI DS modules default to 26 VL-L (low-voltage models) or 90 VL-L (high-voltage models).
• Maximum coupling — The shaft position at which the in-phase component of a stator output is at its greatest, i.e. equals the full line-to-line voltage. VL-L, transformation ratio and phase shift are all specified at this position.
• Null — The small residual voltage left on an output when the shaft sits at electrical zero (or any other minimum-coupling position). Fundamental null (also called quadrature null) is the residual at the reference frequency, which is quadrature in nature; total null is the rms of everything present, including harmonics. Lower nulls mean a cleaner sensor.
• Phase shift (rotor-to-stator) — The lead or lag, in degrees, of a stator output relative to the reference at maximum coupling. Because synchros and resolvers are inductive, some phase shift is inherent; converters tolerate a specified amount. See Phase Shift Limits and Quadrature Error.
• Reference voltage (VREF, Vref) — The AC excitation applied to the rotor of a synchro or resolver; the stator outputs are amplitude-modulated copies of it. Common levels are 26 Vrms and 115 Vrms, most often at 400 Hz (60 Hz is also used). NAI DS modules default to 26 Vref (low-voltage) or 115 Vref (high-voltage); SD modules accept a model-specific frequency band (47 Hz to 20 kHz across the family).
• S/D, R/D (synchro-to-digital, resolver-to-digital) — A converter that measures synchro or resolver signals and outputs a digital angle; NAI’s SD modules are S/D-R/D converters.
• Scott-T transformer — Two interconnected transformers whose turns ratios are chosen so that the pair converts three-wire synchro format into two-phase (sin/cos) resolver format; the conversion works in either direction. NAI SD and DS modules select synchro or resolver format per channel in software (naibrd_SD_SetChanMode, naibrd_DS_SetSynRslMode), so the same channel can serve either format.
• Tracking converter (Type II servo loop) — An S/D or R/D architecture that continuously follows the input angle in a closed loop rather than sampling it. A Type II loop tracks a constant-velocity input with no steady-state lag (full accuracy up to the rated tracking rate), recovers from a step without hanging up, and yields shaft velocity as well as angle. All NAI SD modules use one.
• Transformation ratio (TR) — The ratio of the in-phase output voltage at maximum coupling to the input (reference) voltage; in NAI documentation, TR = maximum output voltage ÷ reference voltage. Used to specify synchros, resolvers and LVDT/RVDTs, and set as a parameter on DS, DL and LD modules. (Not to be confused with the TR module code, which is Thermocouple/RTD — see the table below.)
• Two-speed (coarse / fine) — A pair of synchros or resolvers geared N:1 so one (coarse) turns once per revolution of the shaft while the other (fine) turns N times. Combining them gives the absolute angle of the coarse unit with the resolution and accuracy of the fine unit. NAI SD modules pair adjacent channels and combine the readings for a programmed ratio; DS modules can generate the pair. See Two Speed Synchro/Resolver Examples.
• Zso / Zss / Zro / Zrs — The standard impedances of a synchro or resolver, each measured at rated frequency: Zso — stator with the rotor open; Zss — stator with the rotor shorted; Zro — rotor with the stators open; Zrs — rotor with the stators shorted. Zso is the figure needed to calculate the VA a load draws from a D/S output.

Bus & communication protocols

• ARINC 429 / 575 — Avionics serial data-bus standards (AR/CM modules).
• CANBus — Controller Area Network serial bus (CB/CM modules).
• IRIG — Inter-Range Instrumentation Group timecode standard for time distribution (RG modules).
• MIL-STD-1553 — A dual-redundant avionics command/response data bus (FT/CM modules).
• MIL-STD-1760 — An aircraft-store electrical interconnection standard built on MIL-STD-1553 (FTJ-FTK modules).

Power supplies

• Component derating — Operating parts below their maximum ratings to improve reliability and lifespan across the temperature range.
• Current share — Paralleling multiple supplies so they split the load, for redundancy or added capacity.
• ENABLE* / INHIBIT* — The two VITA 62 control inputs that set a power supply’s outputs all on, all off, or +3.3V_Aux only.
• FAIL* — The VITA 62 output signal that tells other modules the supply is enabled and its outputs are in specification; it asserts on any out-of-spec condition such as overvoltage or overtemperature.
• Holdup time — How long a supply keeps its output in spec after input power is lost.
• Remote sense — Sensing voltage at the load so the supply can compensate for voltage drop in the output leads.
• VBAT — A standby / low-power output rail on VITA 62 supplies for always-on devices.
• VITA 62 — The standard for power-supply modules used in VPX systems.

Module type abbreviations

Code	Module type
AC	Reference Voltage
AD / ADE	A/D Converter (analog input)
AR	ARINC 429/575 Communications
CB	CANBus Communications
CD	Chip Detector
CH	Chassis Manager
CM	Combination / multi-function (e.g. discrete + ARINC, serial + discrete, 1553 + ARINC)
DA	D/A Converter (analog output)
DF	Differential I/O
DL	LVDT Simulation
DS	Synchro Simulator
DT	Discrete I/O
EC	Encoder
EM	Ethernet Network Interface Card
ES	Managed Ethernet Switch
FT	MIL-STD-1553 / MIL-STD-1760
LD	LVDT/RVDT Transformer (measurement)
PT	Pulse Timer Receiver/Generator
RG	IRIG Timecode Receiver/Generator
RT	RTD Measurement
RY	Relay (latching / non-latching)
SC	Serial Communications
SD	Synchro/Resolver Measurement
SG	Strain Gauge Measurement
TC	Thermocouple Measurement
TE	Tri-Redundant Ethernet Interface
TL	TTL/CMOS I/O
TR	Thermocouple/RTD
VR	Variable Reluctance Pulse Counter
VS	Power Supply